017L Search Results

SOT143-4L

Contextual Info: Restriction of Hazardous Substances RoHS Material Declaration: SOT-143 4L (-015LF, -016LF, -017LF, -019LF, -020LF, -021LF, -022LF, -023LF, -026LF, -32LF) Package type: SOT-143 4L (-015LF, -016LF, -017LF, -019LF, -020LF, -021LF, -022LF, -023LF, -026LF, -32LF)

SW TACT SPST

Contextual Info: WB TC 017L SERIES LED TACT SWITCH Feature SPST mini in dimension bi-color LED illuminated available SMT, right angle, and vertical PCB terminal Application consumer products computer products instrumentation communication equipments ► SPECIFICATIONS SWITCH SPECIFICATIONS

CY7C028-15AI

Abstract: WH15 CY7C027 CY7C028 CY7C037 CY7C038 IDT7027
Contextual Info: CY7C027/028 CY7C037/038 PRELIMINARY 32K/64K x 16/18 Dual-Port Static RAM Fully asynchronous operation Automatic power-down Expandable data bus to 32/36 bits or more using Mas­ ter/Slave chip select when using more than one device On-chip arbitration logic

IDT709269

Abstract: IDT709279 014L 100-PIN
Contextual Info: fax id: 5217 CY7C09269/79/89 CY7C09369/79/89 PRELIMINARY ^ C Y P R E S S ~ 16K/32K/64K x16/18 Synchronous Dual Port Static RAM Features Low o p e ratin g p ow er • True D u al-P o rted m e m o ry cells w h ich allo w sim u lta­ n eo us ac c e s s o f th e s a m e m e m o ry location

LXXXXXXXX

Abstract: TNC 24 mk 2 026R CY7C09569V tb136 A14L CY7C09579V
Contextual Info: «oaHaoooiMMMWfMMMMMM!9:^ v’*'» -• -■ -■ -^ jjÉBT *¿f5’00“’ '*'^ 7“T ■ ■ ■ ■ <1; .r {• o CY7C09569V CY7C09579V PRELIMINARY f:,ò b 3.3V 16K/32K x 36 FLEx36 Synchronous Dual-Port Static RAM • 3.3V Low o p e ratin g p ow er

A12L

Abstract: CY7C09349 CY7C09359
Contextual Info: fax id: 521 9 CYPRESS CY7C09349 CY7C09359 PRELIMINARY 4K/8K x 18 Synchronous Dual-Port Static RAM • H ig h-speed clo ck to d ata ac ce ss 6 .5 /7 .5 /1 2 ns m ax. Features • Low o p e ratin g p o w er • True D u al-P o rted m e m o ry cells w h ich allo w sim u lta­

Contextual Info: PRELIMINARY IDT7034S/L HIGH-SPEED 4 K x 18 DUAL-PORT STATIC RAM F ea tu re s: using the Master/Slave select when cascading more than True Dual-Ported memory cells which allow simultaneous * one d evic e_ reads of the same memory location High-speed access

Contextual Info: •ft«»»* PRELIMINARY IDT7034S/L HIGH-SPEED 4 K x 18 DUAL-PORT STATIC RAM «««»5 *K ««:«! ^*SS»:S? •*»> ~ •«¿j F ea tu re s: * * True D ual-Ported m em ory cells which allow sim ultaneous using the M aster/Slave select w hen cascading m ore than

Contextual Info: •$:»£ V HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3389S F ea tu re s: True Dual-Ported memory cells which allow simultaneous access of the same memory location * High-speed clock to data access * - Com m ercial: 5/6ns max.

Contextual Info: •$:»£ V HIGH-SPEED 3.3V 32K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3379S F ea tu re s: * * True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access - * * * * Com m ercial: 5/6ns max.

Contextual Info: HIGH-SPEED 8 K x 18 DUAL-PORT STATIC RAM PRELIMINARY IDT7035S/L Features * * True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access - * ♦ Com m ercial: 15120ns max. Low-power operation - ♦ ♦ ♦ IDT7035S

Contextual Info: I l i l l l 1 IF V 1 F 1 1 U 1 ‘! S y P r • W 0 L HIGH-SPEED 3.3V 32K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3379S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access o f the same memory location ♦ High-speed clock to data access

NSf39

Abstract: IR 0251 CY7C024 CY7C0241 CY7C025 CY7C0251 017L
Contextual Info: fax id: 5206 CY7C024/0241 CY7C025/0251 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int, Busy Features Functional Description • True D u al-P o rted m em o ry ce lls w h ich allow s im u ltan eo u s reads of th e s a m e m e m o ry location • 4K x 16 o rg an iza tio n C Y 7 C 02 4

82c56

Contextual Info: in te i 82C55A CHMOS PROGRAMMABLE PERIPHERAL INTERFACE Compatible with all Intel and Most O tter Microprocessor» • Control Word Read-Back Capability . Direct Bit S .t /R .« t Capability and 80186/188 « & " » £ £ £ ''• * “ ‘' ° Port ° UtpUtS

Contextual Info: fax id: 5215 CY7C027V/028V CY7C037V/038V '•'■'■'■'■'■'■‘JJSt>iW .-. 'S^ìa S S K , : ,„*$& :*■ _ jg ? . "T 3.3V 32K/64K x 16/18 Dual-Port Static RAM • Fully asynchronous operation • Automatic power-down • Expandable data bus to 32/36 bits or more using Mas­

aexxxx

Contextual Info: fax id: 5219 :/ CYPRESS CY7C09349 CY7C09359 4K/8K x 18 Synchronous Dual-Port Static RAM • High-speed clock to data access 6.5/7.5/12 ns max. • Low operating power Features • True Dual-Ported m em ory cells which allow simu Itaneous access of the same memory location

CY7C09349-6AC

Abstract: LT 5219 SAD XT
Contextual Info: fax id: 5219 7^ CYPRESS CY7C09349 CY7C09359 PRELIMINARY 4K/8K x 18 Synchronous Dual-Port Static RAM • High-speed clock to data access 6.5/7.5/12 ns max. • Low operating power Features • True Dual-Ported mem ory cells which allow sim ulta­ neous access of the same mem ory location

70V25

Abstract: CY7C0241 CY7C036AV IDT70V24 CY7C026AV-25AI CY7C025AV15
Contextual Info: W jÊ CY7C024AV/025AV/026AV CY7C0241 AV/0251 AV/036AV PRELIMINARY 3.3V 4K/8K/16K x 16/18 Dual-Port Static RAM Features • True dual-ported m em ory cells which allow sim ulta­ neous access of the same m em ory location • 4/8/16K x 16 organization CY7C024AV/025AV/026AV

LB1910

Abstract: 70V37 A14L IDT70V37 IDT70V37L
Contextual Info: HIGH-SPEED 3.3V 32Kx 18 DUAL-PORT STATIC RAM PRELIMINARY IDT70V37L F e a tu re s True Dual-Ported m em ory cells w hich allow sim ultaneous access of the sam e m em ory location ♦ High-speed access ♦ Com m ercial: 15/20ns max. - ♦ Low -pow er operation

A14L

Abstract: A15L A15R IDT7038 IDT7038L marking 016L
Contextual Info: H IG H-SPEED 64K x 18 DUAL-PORT STATIC RAM Features * True Dual-Ported memory cells which allow simultaneous reads of the same memory location * High-speed access - Com m ercial: 15/20ns max. * Low-power operation - ID T7038L A ctive: 1W (typ.) Standby: 1m W (typ.)

A0L-A12L

Abstract: A12L CY7C09349A CY7C09349A-12AC CY7C09349A-6AC CY7C09349A-7AC CY7C09349A-9AC CY7C09359A CY7C09359A-6AC IND5
Contextual Info: - - = CYPHhbo CY7C09349A PRELI MI NARY_ CY7C09359A = 4K/8K x 18 Synchronous Dual-Port Static RAM High-speed clock to data access 6.5l1V7.5/9/12 ns max. Low operating power Features • True dual-ported m em ory cells which allow sim ulta­ neous access of the same m em ory location

2600 corning

Contextual Info: CY7C09269V/79V/89V CY7C09369V/79V/89V “ tv * I PRELIMINARY 3.3V 16K/32K/64K x 16/18 Synchronous Dual-Port Static RAM • High-speed clock to data access 7.5^1V9/12 ns max. • 3.3V Low operating power Features • True Dual-Ported memory cells which allow sim ulta­

T7035

Contextual Info: HIGH-SPEED 8 K x 18 DUAL-PORT STATIC RAM PRELIMINARY IDT7035S/L Features * * True Dual-Ported memory cells which allow simultaneous using the Master/Slave select when cascading more than reads of the same memory location one d e v ic e _ ♦ M/S = H for BUSY output flag on Master

Contextual Info: •ft«»»* PRELIMINARY IDT7034S/L HIGH-SPEED 4 K x 18 DUAL-PORT STATIC RAM «««»5 *K ««:«! ^*SS»:S? •*»> ~ •«¿j F ea tu re s: * * True Dual-Ported memory cells which allow simultaneous using the Master/Slave select when cascading more than