0100MH Search Results

208H

Abstract: XFGIB100
Contextual Info: Schem atic: S in g le P o rt 1CT:1CT I _I Q: 18 Min OlOOKHz 0.1V Insertion Loss: -1 .0 d B MAX 1MHz-100MHz —1.5dB MAX 0 1 0 0 - 1 25MHz Return Loss: -1 8 d B Min © 1-30M Hz Rise Time: 1.75ns Max. —15dB Min 640MHz -13 .1 d B Min 050MHz —12dB Min ©60-80MHZ -1 0 d B Min 0100MHz

ST CHN t4

Contextual Info: QL5064 QuickPCI Data Sheet •••••• 66 MHz/64-bit PCI Master/Target with Embedded Programmable Logic and Dual Port SRAM Device Highlights High Performance PCI Controller • 64-bit/66 MHz Master/Target PCI Controller automatically backwards compatible to 33 MHz

Contextual Info: S i GEC P L E S S E Y ja n u a r y 1997 ADVANCE INFORMATION s r M I C O N D U r. T O R s D S 4 1 6 3 -2 .9 NWK918 10/100BASE-TX SYMBOL TRANSCEIVER The NWK918 is a Fast Ethernet Transceiver with integrated data and clock recovery for combined 10BASE-T and 100BASE-TX applications. The device connects through a 5

Contextual Info: QL5064 QuickPCI Data Sheet •••••• 66 MHz/64-bit PCI Master/Target with Embedded Programmable Logic and Dual Port SRAM Device Highlights High Performance PCI Controller • 64-bit/66 MHz Master/Target PCI Controller automatically backwards compatible to 33 MHz

L055

Contextual Info: Schematic: S IN G L E PO RT 1 .J ISOLATION; 1500 Vrms TURNS RATIO: (PRI/SEC) 1CTMCT ± 2 % '' ’ 12 t> OCU 350uH MIN OIDOKHz 100mV BmADC 166 . Laft LEB 11 ^ 12 Û- TT Rise Time: 1.75ns Max. 13 û- INSERTION LU55; - l.O d B MAX <01 MHz-lOOMNz -1 .5 d B MAX S ia O -1 2 5 M H z

Contextual Info: Embedded Power for Business-Critical Continuity Rev. 09.26.13 DS1200HE 1 of 9 DS1200HE 1200 Watts Distributed Power System Front-end Bulk Power Total Output Power: 180 to 264Vac: 1200W continuous 90 to 140Vac: 1000W/1200W1 continuous Electrical Specifications

"Programmable Interrupt Controller"

Abstract: design of dma controller using vhdl QL5064 vhdl code dma controller PAR64 QL5064-66APB456C p4 processor 0x40-0xff
Contextual Info: QL5064 - QuickPCITM 66 MHz/64-bit PCI Master/Target with Embedded Programmable Logic and dual Port SRAM DEVICE HIGHLIGHTS High Performance PCI Controller High Performance PCI Target • 64-bit / 66 MHz Master/Target PCI Controller automatically ■ Write posting FIFO increases performance with queued

Contextual Info: SL1935 Single Chip Synthesized Zero IF Tuner DS5300 ISSUE 3.4 Features • • • • • • • • • • • April 2002 Ordering Information Single chip synthesised tuner solution for quadrature down conversion, L-band to Zero IF. DVB compliant, operating dynamic range -70 to

c40m

Abstract: CM1111
Contextual Info: 1. S c h e m a tic : LOWER R O W UPPER ROW 2 . E le c tr ic a l S p e c ific a tio n s: @25°C ISOLATION: 1500Vrms TURNS RATIO: PRl/SEC 1CT:1CT ±2% □CL: 350uH MIN @>100KHz 100mV SmAdc Rise Time: 1.75ns Max INSERTION LOSS: -I.O d B Max @1 M Hz-1 OOMHz

208H

Contextual Info: 1. M echanical D im ensions: B 5.70 Max — 3.66 4 j> 1 O x o 00 D r 4.76 _.co 00 -O L_2 J Üu ^ 2.84 •slCM E SS oo .75 ^ f o' Z, R, X vs. Frequency COMMON MODE 3. E lectrical S p ecificatio n s: 2 . S ch em atic: 1 o- 4 o- • i C -o 3 2 — R — DCR: 0.00075 Ohms Max

XFGIB100

Abstract: L055
Contextual Info: Sch em atic: EIGHT PORT 1 .J ISOLATION; 1500 Vrms TURNS RATIO: (PRI/SEC) 1CTMCT ± 2 % OCL; 350uH MIN OIDOKHz 100mV BmADC Rise Time: 1.75ns Max. INSERTION L055; - l.O d B MAX <01 MHz-lOOMNz -1 .5 d B MAX S I DO- 125MHz RETURN L.055; -1 8 d B Min l-3 0 M H z

Contextual Info: QL5064 - QuickPCITM 66 MHz/64-bit PCI Master/Target with Embedded Programmable Logic and dual Port SRAM QL5064 - QuickPCI DEVICE HIGHLIGHTS Device Highlights High Performance PCI Controller High Performance PCI Target • 64-bit / 66 MHz Master/Target PCI Controller automatically

QL5064

Abstract: AA23 PAR64 REQ64 verilog code for 64 bit barrel shifter 132x64 vhdl code for 8 bit barrel shifter BIST code "ESP"
Contextual Info: QL5064 - QuickPCI ESP 66 MHz/64-bit PCI Controller with Embedded Programmable Logic and Dual Port SRAM Preliminary Data – Revision 2.0 DEVICE HIGHLIGHTS Updated: 19-Jan-99 High Performance PCI Controller - 64-bit / 66 MHz Master/Target PCI Controller

lnb downconverter schematic diagram

Abstract: Tuner I2C program philips uv schematics power supply satellite receiver SL1935C/KG/NP1S Tuner I2C program BB831 BB837 BCW31 SL1935 VP310
Contextual Info: SL1935 Single Chip Synthesized Zero IF Tuner DS5300 ISSUE 3.2 Features • • • • • • • • • • • October 2001 Ordering Information Single chip synthesised tuner solution for quadrature down conversion, L-band to Zero IF. DVB compliant, operating dynamic range -70 to

Contextual Info: SL1935 Single Chip Synthesized Zero IF Tuner DS5300 ISSUE 3.3 Features • • • • • • • • • • • January 2002 Ordering Information Single chip synthesised tuner solution for quadrature down conversion, L-band to Zero IF. DVB compliant, operating dynamic range -70 to

Contextual Info: THE INFORMATION CONTAINED HEREIN IS CONSIDERED 'PROPRIETARY' TO DEL FUSE INC. AND SHALL NOT DE COPIED, REPRODUCED OR DISCLOSED WITHOUT THE WRITTEN APPROVAL OF DEL FUSE INC. RoHS 2002/95/E C J SCHEMATIC ELECTRICAL CHARACTERISTICS g g5°C -O -O O 4 14 13 POLARITY

L055

Abstract: 208H jbk0042 JBK00
Contextual Info: Sch em atic: O n e of F o u r 1 .J ISOLATION; 1500 Vrms TURNS RATIO: (PRI/SEC) 1CTMCT ± 2 % '' ’ 12 t> OCU 350uH MIN OIDOKHz 100mV BmADC 166 TT . Laft LEB 11 ^ 12 Û- Rise Time: 1.75ns Max. 13 û - INSERTION L055; - l.O d B MAX <01 MHz-lOOMNz .Right LED

L055

Contextual Info: Schematic: S IN G L E PORT 1 .J ISOLATION; 1500 Vrms TURNS RATIO: (PRI/SEC) 1CTMCT ± 2 % '' ’ 12 t> OCU 350uH MIN OIDOKHz 100mV BmADC 166 . Laft LEB 11 ^ 12 Û- TT Rise Time: 1.75ns Max. 13 û- INSERTION LU55; - l.O d B MAX <01 MHz-lOOMNz -1 .5 d B MAX S ia O -1 2 5 M H z

BB831

Abstract: BB837 BCW31 SL1935 VP310
Contextual Info: SL1935 Single Chip Synthesized Zero IF Tuner DS5300 ISSUE 3.2 Features • • • • • • • • • • • October 2001 Ordering Information Single chip synthesised tuner solution for quadrature down conversion, L-band to Zero IF. DVB compliant, operating dynamic range -70 to

SL1935

Abstract: ALL BAND ZERO IF TUNER IC rj11 i2c Tuner I2C program BB831 BB837 BCW31 VP310 W919
Contextual Info: SL1935 Single Chip Synthesized Zero IF Tuner April 2004 Features • • • • • • • • • • • Ordering Information Single chip synthesised tuner solution for quadrature down conversion, L-band to Zero IF. DVB compliant, operating dynamic range -70 to

XFGIB100

Abstract: C0MB01-4S
Contextual Info: Schem atic: SINGLE PORT 1 .J ISOLATION: 1500 Vrms TURNS RATIO: (PRI/SEC) 1CT:1CT ±2% OCL: 350uH MIN 100KHz 100mV 8mADC Rise Time: 1.75ns Max. INSERTION LOSS: -1 .0 d B MAX ©1 MHz-100MHz — 1.5dB MAX 0 1 0 0 — 125MHz RETURN LOSS: -1 8 d B Min © 1-30M H z

Contextual Info: QL5064 QuickPCI Data Sheet •••••• 66 MHz/64-bit PCI Master/Target with Embedded Programmable Logic and dual Port SRAM 1.0 Device Highlights High Performance PCI Controller • 64-bit / 66 MHz Master/Target PCI • • • • Controller automatically backwards

aml 10 series

Abstract: OVK D 01
Contextual Info: S c h e m a t i c : SINGLE PORT 1 .J ISOLATION: 15D0 Vrms 11 — 12 □- -I— I TURNS RATIO: (PRI/SEC) 1CTMCT ±2% OCU 350uH MIN 01OOKHz 100mV SmADC 12 û- . Latt LEB Rise Time: 1.75ns Max. 13 û- INSERTION LOSS: - l.O d B MAX O IM hz-lO O M H z -1 .5 d B MAX S I DO-125MHZ

fuse n15

Abstract: af n19 QL5064 vhdl code for 4 channel dma controller PAR64 QL5064-66APB456C
Contextual Info: QL5064 - QuickPCITM 66 MHz/64-bit PCI Master/Target with Embedded Programmable Logic and dual Port SRAM Updated 5/8/2000 QL5064 - QuickPCI DEVICE HIGHLIGHTS Device Highlights High Performance PCI Controller High Performance PCI Target • 64-bit / 66 MHz Master/Target PCI Controller automatically