ZD 409 Search Results

Contextual Info: WESTERN DIGITAL C O R P O R A T I O N WD1943 8136 Dual Baud Rate Clock XTAL/EXT 1 d + 5V ^ 18 17 16 ZD X TAL/EXT ZD TT ZD T a fR 3 r A 4 15 = 3 Tb r B 5 14 RC 6 13 r d CU 7 12 STR 8 NC 9 11 10 ZD TC ZD TO ZD STT ZD G ND ZD F/4 • OPERATES WITH CRYSTAL OSCILLATOR OR EX­

D8243

Abstract: dallas nvram C900 DS2436 DS2436Z
Contextual Info: DS2436 PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS2436 Battery ID/Monitor Chip PACKAGE OUTLINE • O n -b o a rd A/D converter monitors battery voltage for e n d -o f-c h a rg e and e n d -o f-d is c h a rg e determ ination QE [IE 1 8 ZD 2 7 ZD NC DQ CLL

Contextual Info: DS1651, DS1652 DS1651 3-Code Lock DS1652 Key Match Memory System DALLAS SEMICONDUCTOR PIN ASSIGNMENT FEATURES • The two-chip lock and key system forms the basis of a secure access system 1 8 m SEND2 n r 2 7 ZD DATA I/O l e a r n cet 3 6 in SEND3 SEND4 C U

zd 409

Abstract: 20MS SFH415
Contextual Info: I n f r a r e d E m it t e r s IR -L u m in e s zen zd io d e n 3. Em itters in Plastic Package 3. Emitter im Plastikgehàuse Package Type SFH 415 S FH 415-U ^•peak nm <P deg. I. mW/sr W V 950 ± 17 > 25 > 40 1.3 Ordering code at /F = 100 mA I p = 20 ms

ixxx

Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Interface Architecture • Page Program Operation - Single Cycle Reprogram Erase and Program - 4096 Pages (264 Bytes/Page) Main Memory • Two 264-Byte SRAM Data Buffers - Allows Receiving of Data while Reprogramming of

Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Interface Architecture • Page Program Operation - Single Cycle Reprogram Erase and Program - 4096 Pages (264 Bytes/Page) Main Memory • Two 264-Byte Data Buffers - Allows Receiving of Data while Reprogramming of

Contextual Info: Features • Single 4.5V - 5.5V Supply • Serial Interface Architecture • Page Program Operation -S in g le Cycle Reprogram Erase and Program - 4096 Pages (264 Bytes/Page) Main Memory • Two 264-Byte Data Buffers - Allows Receiving of Data while Reprogramming of

Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Interface Architecture • Page Program Operation -S in g le Cycle Reprogram Erase and Program - 4096 Pages (264 Bytes/Page) Main Memory • Two 264-Byte Data Buffers - Allows Receiving of Data while Reprogramming of

Contextual Info: Features Low Voltage and Standard Voltage Operation 5.0 Vcc = 4.5 V to 5.5 V 3.0 (Vcc = 2.7 V to 5.5 V) 2.5 (Vcc = 2.5 V to 5.5 V) 1.8 (Vcc = 1.8 V to 5.5 V) Internally Organized 4096 x 8, 8192 x 8 Two-Wire Serial Interface Bidirectional Data Transfer Protocol

4402 semi

Abstract: resisten
Contextual Info: Or mC IVj iIIi Hx -^H n- Uo £ M ,Dn a , N-MOS RAM 100, 150 NSEC STATIC D IF F E R E N T IA L OUTPUT 4 0 9 6 x 1 q □ □ □ □ □ STATIC - NO REFRESH OR CHARGE PUMP OSCILLATOR REQUIRED 4096 WORD x 1 BIT ORGANIZATION 100 NSEC ACCESS, 300 NSEC C Y C L E -4 4 0 2 B

zd 409

Contextual Info: CMOS DRAM KM416C156B/BL/BLL 256K x 1 6 Bit CMOS Dynamic RAM with Fast Page Mode GENERAL DESCRIPTION FEATURES • P erfo rm a nce range: tR A C KM416C156B/BLVBLL-5 : 50ns tC A C tRC 15ns 90ns KM416C156B/BLVBLL-6 60ns J 15ns 110ns KM416C156B/BLVBLL-7 70ns I

zd107

Contextual Info: A H i^h P crform ,iin i ZM X H CMOS DRAM \S4I C 2M 8S0 _! \i x 8 CMOS Syiithronmis DRAM Advance information Features • Organization: 1,048,576 w ords x 8 bits x 2 banks • All signals referenced to positive edge o f clock • Dual internal banks controlled by BA

Contextual Info: european space agency agence spatiale européenne Pages 1 to 72 INTEGRATED CIRCUITS, SILICON MONOLITHIC, CMOS SILICON GATE, STATIC 64K 4096 x 16 BIT DUAL PORT MEMORY WITH 3-STATE OUTPUTS, BASED ON TYPE M67024EV ESA/SCC Detail Specification No. 9301/034 space components

Contextual Info: KM416C1OOOA/A-L/A-F CMOS DRAM 1M x 16 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: tRAC tCAC tRC 60ns 15ns 110ns KM416C1000A-7/A-L7/A-F7 70ns 20ns 130ns KM416C1000A-8/A-L8/A-F8 80ns 20ns 150ns KM416C1000A-6/A-L6/A-F6

4402B

Abstract: 4402 semi 4096X1 ON SEMI cross memory device sense amplifier RAM cells bit lines "select line" 4402a
Contextual Info: o rn ili O CIVII x ^n o a n 100, 150 NSEC STATIC D IF F E R E N T IA L OUTPUT N-MOS RAM 4096x1 e > i~ OTLJR □ □ □ □ □ STATIC - NO REFRESH OR CHARGE PUMP OSCILLATOR REQ UIRED 4096 WORD x 1 BIT O R G A N IZA TIO N 100 NSEC ACCESS, 300 NSEC CYCLE - 4402B

Contextual Info: KM416V1004A/A-L/A-F CMOS DRAM 1M x 16 Bit CMOS Dynamic RAM with Extended Data Out FEATURES GENERAL DESCRIPTION • Performance range: T h e S a m s u n g K M 4 1 6 V 1 0 0 4 A /A -L 7 A -F is a C M O S high s p e e d 1 ,0 4 8 ,5 7 6 b it x 1 6 D y n a m ic R a n d o m A c c e s s

Contextual Info: KM416C1004A/A-L/A-F CMOS DRAM 1M x 16 Bit CMOS Dynamic RAM with Extended Data Out FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KM416C1004A/A-L/A-F is a CMOS high speed 1,048,576 bit x 16 Dynamic Random Access Memory. Its design is optimized fo r high performance

Contextual Info: CMOS DRAM KM416C1OOOA/A-L/A-F 1M x 16 Bit CMOS Dynamic RAM with Fast Page Mode GENERAL DESCRIPTION FEATURES • Performance range: tRAC tCAC tRC KM416C1000A-6/A-L6/A-F6 60ns 15ns 110ns KM416C1OOOA-7/A-L7/A-F7 70ns 20ns 130ns KM416C1000A-8/A-L8/A-F8 80ns 20ns

Contextual Info: KM416C1004A/A-L/A-F CMOS DRAM 1M x 16 Bit CMOS Dynamic RAM with Extended Data Out FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KM416C1004A/A-L/A-F is a CMOS high speed 1,048,576 bit x 16 Dynamic Random Access Memory. Its design is optimized for high performance

Contextual Info: UK Preliminary Information 4096 x 8 Bit X24325 32K Advanced 2-Wire Serial E2PROM with Block Lock Protection FEATURES DESCRIPTION * 2.7V to 5.5V Power Supply * Low Power CMOS — Active Read Current Less Than 1 mA — Active Write Current Less Than 3mA — Standby Current Less Than 1 iA

hy57v168010a

Abstract: hy57v168010 HY57V164010 HY57V161610 400k5
Contextual Info: 16Mbit Synchronous DRAM Series -HYUNDAI HY57V164010- 4Mx4bit Synchronous DRAM HY57V168010- 2Mx8blt Synchronous DRAM HY57V161610- 1Mx16bit Synchronous DRAM DESCRIPTION The HY57V164010, HY57V168010, HY57V161610 are high speed 3.3 Volt synchronous dynamic RAMs

hy57v168010b

Abstract: hy57v168010 hy57v16801
Contextual Info: -H Y U N D A I - • H Y 5 7 V 1 6 8 0 1 0 B 2 Banks x IM X 8 Bit Synchronous ORAM DESCRIPTION The Hyundai HY57V168010B is a 16,777, 216-bits CMOS Synchronous DRAM, ideally suited tor the main memory applications which require large memory density and high bandwidth. HY57V168010B is organized as 2banks of

AF6 din 74

Contextual Info: CMOS DRAM KM416V1OOOA/A-L/A-F 1 M x 16 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: tRAC tCAC tRC K M 416 V 1000 A -6/A -L 6/A -F 6 60ns 15ns 110ns K M 416 V 1000 A -7/A -L 7/A -F 7 70ns 20ns 130ns K M 416 V 1000 A -8/A -L 8/A -F 8

DKH09

Contextual Info: 1 I IE , I File Noi 1353~ I I SHEET 1 / 1 SPECIFICATIONS Color:Black PackingrBulk 17.0 409848 CATEGORY A ¿L AUK 1 I APPROVED BY Hood A MEMBER OF A U K GROUP PART No. MEI CHECKED BY DKH09 AUK CONTRACTORS CO. LTD. DRAWING No. DKH09 SCALE I I RAN DRAWING BY