Z800 Search Results

AM7990

Contextual Info: Am7990 Local Area Network Controller for Ethernet LANCE DISTINCTIVE CHARACTERISTICS • • • • • Compatible with Ethernet and IEEE-802.3 10Base5 Type A, and 10Base2 Type B, "C heapernet") Easily interfaced to 8086, 68000, Z8000*, LSI-II* microprocessors

25LS2521

Abstract: 25LS244 8051 interface 8155 8251 with 8086 9511A 6259A 8155 programmable peripheral interface 9517A AMZ8536 8253 interface with 8086 Peripheral
Contextual Info: MOS Microprocessor MOS Microprocessor Family Selector Guide 8086/88 8085A 8085A-2 8080A Z8001/2t Z8001/2-A Clock Parted 200ns 320ns 200ns Clock Generator 8284A On-Chip On-Chip 8224 8127 8127 Arithmetic Processing Unit 8087 9511A-1 9512-1 9 5Í1A -4 9512-1

Z8030ACS

Abstract: Z8030APS Z8030A IN SDLC PROTOCOL USING SCC WITH Z8000 IN SDLC PROTOCOL CRC-16 Z8000 Z8030 z-scc Z8030 PS
Contextual Info: Z8030 Z8000 Z-SCC Serial Communications Controller Product Specification Zilog A pril 1985 • Two in dependent, 0 to 1.5M bit/second, fullduplex channels, eac h with a separate crystal oscillator, b a u d rate generator, a n d Digital Phase-L ocked Loop for clock recovery.

Z8070

Abstract: Z800 zilog z800 Z8108 Z8208 Z800 1983 393 AF ME20 Z80 CPU Instruction Set Z8116
Contextual Info: Z800 NPU Fam ily • 7 J iM M llO y P relim inary Product Specification September 1983 ■ Enhanced Z80 instruction set that maintains object-code compatibility with Z80 microprocessor. High performance 16-bit Z-BUS interface or 8 -bit Z80-compatible bus interface.

nonseg

Contextual Info: Z8001 / Z8002® Military Z8000® CPU Central Processing Unit Military Electrical Specification 17 :1 M llO y September 1988 FEATURES • Regular, easy-to-use architecture ■ Instruction set more powerful than many minicomputers ■ Directly addresses 8

Z8002 AB1V

Abstract: Z8001 Z8001 package size Z8000 Z8002 Z8001AB1V Z8001 AB1V heart rate monitor using ldr tda 2070 rh ix 0689
Contextual Info: 2 I I»»» r z 7 S G S -T H O M S O N Ä 7 # [ » [ R K s m i O T ® « ! Z 8001 S E G C P U Z8002 CPU CENTRAL PROCESSING UNIT • Regular, easy-to-use architecture. ■ Instruction set more powerful than many m ini­ computers. ■ Directly addresses 8 M bytes.

Z160 gpu

Abstract: Z08001 zilog z160 zilog z16 Z160 z0800 ba1515 5 R 107 hj 4094 AD0-AD15
Contextual Info: v Zilog i -pìì^ifiyi., i3g s««“ î!5ïg^ggs»»^: Product Specification Z160 CPU Central Processing Unit October 1988 FEATURES • Fully software compatible member of the Z8000 architecture. ■ Instruction set more powerful than many minicomputers

constant time delay

Abstract: circuit diagram of MOD 100 counter z-cio Z8000 Z8036
Contextual Info: «.'tí.:»- Zilog P ro d u c t S p e c ific a tio n Z 8036 Z8000 Z-CIO C ounter/Tim er an d P ara llel I/O U nit October 1988 Features G eneral Description • Two in d ep en d en t 8-bit, double-buffered, bidirectional I/O ports plus a 4-bit special-purpose I/O port. I/O ports

Z8010

Abstract: GE rcrt Z8000 Z8010-MMU 1s463 zilog z8001
Contextual Info: ZILOG INC 17E D • 1^04043 G G i n i 4 T ii L i« « P ! R i P ;.^ rn.v^v^fiv'yfc n ii v in i"; P ro d u c tS p e c ific a tio n Z8010 Z8000 MMU Memory Management Unit October 1988 Features ■ Dynamic segment relocation makes software addresses independent of physical memory

Contextual Info: ZI LO G INC 03 D È I T T Ö M O M B □□□fllSS □ | 9984043 ZILOG INC 03E 08155 Z8030 M ilitary T-iS-Zl-oy Z8000 Z-SCC Serial Communications Controller Military Zilog Electrical Specification July 1985 FEATURES • Two independent, 0 to 1.5M bit/second, full-duplex

Z8016

Abstract: z8000 microprocessor zilog Z8000
Contextual Info: ZILOG 17E I NC D • TTÖ40M3 ~ ' Ÿ ¿ ¿ Ä lS ii 6 a t iä 6 i i i i i i S i i S 8 fe M 00in 30 6 ■ I- S Z - ^ - l ^ Z 8016 Z8000 Z-DTC Direct Memory Access Transfer Controller O ctober 1988 FEATURES ■ M em ory-to-peripheral transfers up to 2.66M bytes per

Contextual Info: Zilog P r o d u c t S p e c i f ic a t io n Z8016 Z8000 Z-DTC Dived Mem ory Access Transfer Controller October 1988 FEATURES • Memory-to-peripheral transfers up to 2.66M bytes per second at 4 MHz. ■ Memory-to-memory transfers up to 1.33M bytes per second at 4 MHz.

Contextual Info: UNCONTROLLED DOCUMENT PART NUMBER REV. SSP —BLS3803S812 ELEC TRO -O P TIC AL CHARACTERISTICS Ta = 2 5 T PARAMETER MIN V f= 1 2 V TYP PEAK WAVELENGTH MAX 590 FORWARD VOLTAGE 14- 5,0 Vf AXIAL INTENSITY Z800 Vr cd/m ^ VIEWING ANGLE 12Ü 2x theta EMITTED COLOR:

L240

Contextual Info: UNCONTROLLED DOCUMENT PART NU M BER REV. SSP —B L S 2 5 0 3 S 8 1 2 ELECTRO-OPTICAL CHARACTERISTICS Ta = 25 C PARAMETER MIN PEAK WAVELENGTH Vf=12V TYP MAX UNITS 590 FORWARD VOLTAGE 12 REVERSE VOLTAGE 14 5.0 Vf AXIAL INTENSITY Z800 Vr cd/m2 VIEWING ANGLE

Z8036APS

Abstract: Z-CIO Z8000 Z8036 Z8036A Z8036CM Z8036CS Z8036PS
Contextual Info: Z8036 Z8000 z-C10 Counter/Timer and Parallel I/O Unit Product Specification Zilog A pril 1985 General Description Two in d ep en d en t 8-bit, double-buffered, bidirectional I/O ports plus a 4-bit special-purpose I/O port. I/O ports feature program m able polarity,

z8000cpu

Abstract: Z8000 Z8001 Z8002 Z8010 Z8000A CPU Zilog z8000 manual rs001s
Contextual Info: Z8000 CPU Technical Manual » 7 ^ 1 • 7 il • 7 -i1 ZilOQ fable of Contents 1.1 1.2 1.3 Introduction . 1-1 G eneral O rg a n iz a tio n . . . . 1-1

z80b

Abstract: z80a
Contextual Info: m mm N E L FREQUENCY CONTROLS TO NEL DE t."4Söl7ö 0000054 3 ggpisK *» CEockOsciüators üaTOütput MOS/TTL Compatible HS-2840 Series Application The HS-2840 oscillator is suited for Z80, Z80A/B and Z8000 micro­ computer systems applications where a TTL compatible clock at

c828 transistor datasheet

Abstract: C828 transistor transistor c828 c828 Z80A-CTC a684 transistor C838 transistor c828 datasheet z80a-PIO C880 transistor
Contextual Info: APPLICATION NOTE 9 SCC IN BINARY SYNCHRONOUS COMMUNICATIONS 9 INTRODUCTION Zilog’s Z8030 Z-SCC Serial Communications Controller is one of a family of components that are Z-BUS compatible with the Z8000 CPU. Combined with a Z8000 CPU or other existing 8- or 16-bit CPUs with nonmultiplexed buses

Z8002A

Abstract: scr LDK packages
Contextual Info: Z8001VZ8002* 16-Bit Microprocessors 2008Z/.L008Z DISTINCTIVE CHARACTERISTICS • • • 4, 6, 8 MHz CPU Clock High throughput with low system clock rate tor easi­ er system design Powerful General Register Architecture 16 general registers provide high throughput in all

am7990

Abstract: time domain reflectometer AM7990DC
Contextual Info: Am7990 Local Area Network Controller for Ethernet LANCE DISTINCTIVE CHARACTERISTICS Compatible with Ethernet and IEEE-802.3 Rev D (10 Base 5 Type A, and 10 Base 2 Type B, "Cheapernet") Easily interfaced to 8086, 68000, Z8000, LSI-II micro­ processors On-board DMA and buffer management, 48 byte FIFO

Contextual Info: It run R E A L-TIM E C LO C K JL NO. EK-086-9804 RP/RF/R J 5 C 1 5 OUTLINE The KP/KF/KJ5C15 are real-time clocks for microcomputers that can be connected directly to data buses of 16bit CPUs, such as the 8086, Z8000, and 68000, and of 8bit CPUs, such as the 8085A, Z80, 6809, and 6502. They

z08030

Abstract: TDA 2020 Application Z0803006CME Z0803004CMB z0803006 M/TDA 2016 Z08030-04CMB TDA 2020 z080300
Contextual Info: | ¿ illO y Z8030 Military Z8000 Z-SCC Serial Communications Controller Military Electrical Specification D ecem ber 1989 FEATURES • Two independent, 0 to 1.5M bit/second, full-duplex channels, each with a separate crystal oscillator, baud rate generator, and Digital Phase- Locked Loop for clock

Z8010

Abstract: Z8002 Z8003 Z8090 86dec z8000 microprocessor zilog Z8000 Z8001 Z8000A z8000cpu
Contextual Info: Oi Z8000 Z8000 CPU User's Reference M anual Z8000 CPU User's Reference M anual •t : i T i l ■7-nA / t Zilog Prentice-Hall, Inc., Englewood Cliffs, New Jersey 07632 L ib r a r y o f C o n g ress C a ta lo g in g in P ublication Data M ain entry u nder title:

Z8001ACE

Abstract: z8001aps Z8001PS Z8002BPS Z8002PS Z8002APS z8000cpu Z8010 Z8002 z8002cs
Contextual Info: Z8001/2 Z8000 CPU Central Processing Unit ùllO g Product Specification A pril 1985 i Regular, easy-to-use architecture • Instruction set m ore powerful than m any m inico m pu ters l Directly addresses 8 M bytes i Eight user-selectable addressin g m odes