Y7A MARKING Search Results

Contextual Info: TLV7211, TLV7211A CMOS COMPARATORS WITH RAIL-TO-RAIL INPUT AND PUSH-PULL OUTPUT www.ti.com SLCS149B – AUGUST 2006 – REVISED JANUARY 2007 FEATURES APPLICATIONS • • • • • • • • • • • • Parameters Specified at 2.7-V, 5-V, and 15-V

TY7211

Contextual Info: TLV7211, TLV7211A CMOS COMPARATORS WITH RAIL-TO-RAIL INPUT AND PUSH-PULL OUTPUT www.ti.com SLCS149B – AUGUST 2006 – REVISED JANUARY 2007 FEATURES APPLICATIONS • • • • • • • • • • • • Parameters Specified at 2.7-V, 5-V, and 15-V

Contextual Info: TLV7211, TLV7211A CMOS COMPARATORS WITH RAIL-TO-RAIL INPUT AND PUSH-PULL OUTPUT www.ti.com SLCS149B – AUGUST 2006 – REVISED JANUARY 2007 FEATURES APPLICATIONS • • • • • • • • • • • • Parameters Specified at 2.7-V, 5-V, and 15-V

30-pin simm memory

Abstract: 64k 30-pin SIMM cx59 Y7A marking 30 pin SIP dram memory 30-pin SIMM 64k X 8 30-pin SIMM
Contextual Info: M IC R O N MT8068 64K X 8 DRAM DRAM MODULE PIN ASSIGNMENT (Top View OPTIONS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ KÄ5 ■ CX59 ■ *D9 ■ Vcc ■ Vcc CÄ5 DQ1 AO A1 DQ2 A2 A3 Vss DQ3 A4

Contextual Info: MT4LC4M4B1 L 4 MEG X 4 DRAM MICRON 4 MEG x 4 DRAM DRAM 3.3V, FAST PAGE MODE, OPTIONAL EXTENDED REFRESH FEATURES PIN ASSIGNMENT (Top View) OPTIONS MARKING • Timing 60ns access 70ns access -6 -7 • Packages Plastic SOJ (300 mil) DJ • Refresh Rate Standard 32ms period

Contextual Info: MT8D88C132 S , MT16D88C232(S) 4MB, 8MB DRAM CARDS MICRON I TECHNOLOGY. INC. DRAM CARD 4,8 MEGABYTES 1 MEG, 2 MEG x 32; 5V, FAST PAGE MODE, OPTIONAL SELF REFRESH FEATURES • • • • • • • • OPTIONS MARKING • Timing 60ns access 70ns access -6

MT4C8512

Abstract: ITE 8512 MT4CB512
Contextual Info: M IC R O N 512K DRAM MT4C8512 X 8 DRAM 512K x 8 DRAM FAST PAGE MODE FEATURES • Industry-standard x8 pinouts, tim ing, functions and packages • Address entry: ten row-addresses, nine colurnnaddresses • High-perform ance CM OS silicon-gate process • S in g le + 5 V ±10% power supply*

Contextual Info: ADVANCE MT4LC8M8E1/B6 8 MEG x 8 DRAM MICRON I TECHNOLOGY. INC. 8 MEG x 8 DRAM NEW DRAM 3.3V, FAST PAGE MODE • Single +3.3V ±0.3V power supply • Industry-standard x8 pm out, timing, functions and packages • 13 row-addresses, 10 column-addresses E l or

Contextual Info: I^ IIC Z R O N X M T10D140 40 DRAM M ODULE 1 MEG x 40 DRAM _ FAST PAGE MODE MT10D140 LOW POWER, EXTENDED REFRESH (MT10D140 L) F I . FEATURES • • • • • • • • • 72-pin single-in-line package High-performance, CM OS silicon-gate process. Single 5V ±10% power supply

Contextual Info: MICRON SEMICONDUCTOR INC b3E 1 • M IC R O N 2 MEG □RAM _ MODULE I V I V / iy blllSMT ÜDGÔlfiO 032 H M R N 2 MEG x X MT20D240 40 DRAM MODULE 40 DRAM FAST-PAGE-MODE MT20D240) lo w p o w e r, F EXTENDED Y T F M n F n R REFRESH F (MT20D240 L) V / FEATURES

Contextual Info: MICRON TECHNOLOGY INC SSE D • b lllS ^ TECHNOLOGY, INC. DRAM 4 MEG X4 DRAM DRAM 3.3V FAST PAGE MODE FEATURES • Industry standard x4 pinout, timing, functions and packages • High-performance, CMOS silicon-gate process • Single power supply: +3.3V ±10%

Contextual Info: ADVANCE M T4LC 16M 4A7/T8 16 MEG X 4 DRAM M IC R O N DRAM 16 MEG x 4 DRAM 2 3.3V, FAST PAGE MODE FEATURES • Single +3.3V +0.3V power supply • Industry-standard x4 pinout, tim ing, functions and packages • 13 row-addresses, 11 column-addresses (A7 or

Contextual Info: MT4C1006J 4 MEG X 1 DRAM |U |IC = R O I\ J DRAM 4 MEG X 1 DRAM STATIC COLUMN FEATURES PIN ASSIGNMENT Top View • Industry standard x l pinout, timing, functions and packages • High-perform ance, CM OS silicon-gate process • Single +5V ±10% power supply

Contextual Info: MT2D25632, MT4D51232 256K, 512K x 32 DRAM MODULES U IIC Z R O N 256K, 512K x 32 DRAM MODULE 1, 2 MEGABYTE, 5V, FAST PAGE MODE FEATURES PIN ASSIGNMENT (Front View • JEDEC- and industry-standard pinout in a 72-pin single-in-line memory module (SIMM) • High-performance CMOS silicon-gate process

5v dram 88 pin card

Contextual Info: PRELIMINARY M ir n O N • MT8D88C132VH/432VH S , MT16D88C232VH/832VH(S) 4MB, 8MB, 16MB, 32MB DRAM CARDS DRAM MINICARD 4,8,16*, 32* megabytes 1 MEG, 2 MEG, 4 MEG, 8 MEG x 32; 3.3V, FAST PAGE MODE, OPTIONAL SELF REFRESH FEATURES • • • • • • •

4c4m4a

Abstract: Y7A MARKING
Contextual Info: 4 MEG X 4 FPM DRAM I^ IIC R C IN MT4LC4M4B1,MT4C4M4B1 MT4LC4M4A1,MT4C4M4A1 n R AM ^ r » »1 FEATURES • Industry-standard x4 pinout, timing, functions and packages • State-of-the-art, high-performance, low power CMOS silicon-gate process • Single power supply +3.3V ±0.3V or +5V ±10%

Contextual Info: PRELIMINARY M IC R O N • 4 MEG X 16 FPM DRAM TECHNOLOGY. INC DRAM MT4LC4M16F5 FEATURES • Single +3.3V ±0.3V power supply • Industry-standard xl6 pinout, timing, functions and packages • 12 row, 10 column addresses • High-performance CMOS silicon-gate process

4c1004

Contextual Info: M IC R O N I MT4C1004J S 4 MEG X 1 DRAM •ZMCONDUCTÜR IM C 4 MEG X 1 DRAM DRAM STANDARD OR SELF REFRESH FEATURES PIN ASSIGNMENT (Top View) • 1,024-cycle refresh distributed across 16ms (M T4C1004J) or 128ms (MT4C1004J S only) • Industry-standard pinout, timing, functions and

Contextual Info: MT4C1664/5 L 64K X 16 DRAM I^ IIC R O N 64K x 16 DRAM DRAM LOW POWER EXTENDED REFRESH FEATURES • Industry standard x l6 pinouts, timing, functions and packages • High-perform ance, CM OS silicon-gate process • Single +5V ±10% power supply • All device pins are fully TTL compatible

Contextual Info: M I C R O N I M T 5 8 L C 1 2 8 K 1 6/18D8 128K x 16/18 SYNCBURST SRAM lECHNOtOC.V INC SYNCHRONOUS 128K x 16/18 SRAM O +3-3V SUPPLY, PIPELINED, BURST COUNTER a n d s in g l e - c y c l e d e s e l e c t D A I t Jl OliMIVI FEATURES Fast access times: 4.5, 5 ,6 and 7ns

Contextual Info: ADVANCE M IC R O N MT58LC64K16/18G1 64K X 16/18 SYNCBURST SRAM SYNCHRONOUS SRAM 6 4 K x 16/18 SRAM +3.3V SUPPLY, +2.5V I/O, PIPELINED, BURST COUNTER AND SINGLE-CYCLE DESELECT PIN ASSIGNMENT Top View 100-Pin TQFP • • • • Fast access times: 4.5,5,5.5 and 6ns

MT4LC16M4H9

Contextual Info: PRELIMINARY 16 MEG x 4 EDO DRAM |U|IC=RaN HR AM MT4LC16M4G3 MT4LC16M4H9 FEATURES • Single +3.3V ±0.3V power supply • Industry-standard x4 pinout, timing, functions and packages • 12 row, 12 column addresses H9 or 13 row, 11 column addresses (G3) • High-performance CMOS silicon-gate process

1024x8 memory

Contextual Info: PRELIMINARY 8 MEG x 8 EDO DRAM l^ ic iR o r s j MT4LC8M8P4 MT4LC8M8C2 DRAM FEATURES • Single +3.3V ±0.3V power supply • Industry-standard x8 pinout, timing, functions and packages • 12 row, 11 column addresses C2 or 13 row, 10 column addresses (P4)

Contextual Info: MICRON S E M I C O N D U C T O R INC b3E D • blllSHT MICRON I DDDfih22 T45 M M R N M T4C 8512/3 L m O K vX R8 WIDE \A/inP DRAM nOAM 512K S ili ICONOUCTOR MC WIDE DRAM 512K X 8 DRAM LOW POWER, EXTENDED REFRESH FEATURES • Industry-standard x8 pinouts, timing, functions and