V-BY-ONE HS Search Results

Contextual Info: THCV234_Rev.1.00_E_Brief THCV234 V-by-One HS High-speed video data receiver with bi-directional transceiver General Description Features THCV234 is V-by-One® HS High-speed video data receiver with bi-directional transceiver. It convey not only video data Main-Link , but also

Contextual Info: THCV233_Rev.1.00_E_Brief THCV233 V-by-One HS High-speed video data transmitter with bi-directional transceiver General Description Features THCV233 is V-by-One® HS High-speed video data transmitter with bi-directional transceiver. It convey not only video data Main-Link , but also

77261

Abstract: TEXAS 77261
Contextual Info: TMS29LF0Q8T, TMS29LF008B 1048576 BY 8-BIT FLASH MEMORIES * Single Power Supply Supports 2.7-V and 3.6-V Read/Write Operation f • Organization . . . • Array Blocking Architecture - One 16K-Byte Boot Sector - Two 8K*Byte Parameter Sectors - One 32K-Byte Sector

Contextual Info: THCV218_Rev.1.00_E_Brief THCV218 V-by-One HS High-speed video data receiver General Description Features THCV218 is designed to support video data transmission between the host and display. One high-speed lane can carry up to 32bit data and 3 bits of synchronizing signals at a pixel clock

Contextual Info: THCV217_Rev.1.00_E_Brief THCV217 V-by-One HS High-speed video data transmitter General Description Features THCV217 is designed to support video data transmission between the host and display. One high-speed lane can carry up to 32bit data and 3 bits of synchronizing signals at a pixel clock

Contextual Info: THCV220_Rev.1.00_E_Brief THCV220 V-by-One HS High-speed video data receiver General Description Features THCV220 is designed to support video data transmission between the host and display. One high-speed lane can carry up to 32bit data and 3 bits of synchronizing signals at a pixel clock

Contextual Info: THCV218_Rev.1.00_E_Brief THCV218 V-by-One HS High-speed video data receiver General Description Features THCV218 is designed to support video data transmission between the host and display. One high-speed lane can carry up to 32bit data and 3 bits of synchronizing signals at a pixel clock

Contextual Info: PRELIMINARY THCV226_Rev.1.00_E_Brief THCV226 V-by-One HS High-speed Video Data Receiver General Description Features THCV226 is designed to support video data transmission between the host and display. This chip can receive 32bit video data and 3bit control data via

Contextual Info: PRELIMINARY THCV226_Rev.1.00_E_Brief THCV226 V-by-One HS High-speed Video Data Receiver General Description Features THCV226 is designed to support video data transmission between the host and display. This chip can receive 32bit video data and 3bit control data via

TRANSFORMERLESS

Abstract: MBI6001N1D ac dc led constant current driver
Contextual Info: Preliminary Datasheet Macroblock MBI6001N1D Transformerless AC/DC Constant Current Driver Features n n n n Directly powered by 110 VAC, Transformerless Constant output current , 18 mA Drive one string of LEDs. VOUT is up to 60 V while applying 110V AC. Small footprint: 24-pin SOP24 package

ac dc led constant current driver

Abstract: transformerless MBI6001N1N 1-10v Application Note
Contextual Info: Preliminary Datasheet Macroblock MBI6001N1N Transformerless AC/DC Constant Current Driver Features n n n n Directly powered by 110 VAC, Transformerless Constant output current, 18 mA Drive one string of LEDs. VOUT is up to 60 V while applying 110V AC. Small footprint: 14-pin DIP14 package

220vac LED driver

Abstract: TRANSFORMERLESS 220v led driver circuit MBI6001 MBI6001N2D SOP24-package 220v led driver 220v ac led drive
Contextual Info: Preliminary Datasheet Macroblock MBI6001N2D Transformerless AC/DC Constant Current Driver Features n n n n Directly powered by 220 VAC, Transformerless Constant output current, 16 mA Drive one string of LEDs. VOUT is up to 140 V while applying 220V AC. Small footprint: 24-pin SOP24 package

AN-132

Abstract: OP-470
Contextual Info: i n A v a i H i ANALOG U DEVICES AN-132 APPLICATION NOTE ONE TECHNOLOGY WAY • P.O. BOX 9106 • NORWOOD, MASSACHUSETTS 02062-9106 • 617/329-4700 OP-470 SPICE Macro-Model by Jo« Buxton INTRODUCTION This application not* describes the SPICE macro-modal for the

Contextual Info: 3-INPU T 1 MUTE VIDEO SW ITCH NJM2273 NJM2273 is a switching IC for switching over from one audio or video input signal to another. Internalizing the mute function which can be operated by 3 inputs. It is a higher performance video switch, with the operating supply voltage 5 to 12 V, frequency

Contextual Info: TOSHIBA TMP93PS42A Low V olta ge / Low Pow er C M O S 16-bit M icro-controller T M P 9 3P S42A F 1. O UTLINE A N D DEVICE CH ARACTERISTICS The TMP93PS42A is OTP type MCU which includes 64K byte One-time PROM. Using the adapter-socket, you can write and verify the data for the TMP93CS42A by

CY7C1009-15VC

Contextual Info: C Y 7 C 1 0 0 9 C Y 7 C 1 0 9 P Yi. PX :V «*1 128K 8 Static RAM active HIGH chip enable CE2 , an active LOW output enable (UE), and three-state drivers. Writing to the device is accom­ plished by taking chip enable one (CEi) and write enable (WE) inputs LOW and chip enable two (CE2) input HIGH. Data on

74HC4046 application note

Abstract: mn3106 74hc4046 74hc4046 PIN DIAGRAM HSYNC GENERATE PIXEL CLOCK 74hc4046 application notes 74hc4046 application Frequency Generator 74HC4046 74HC4046A 74LS624
Contextual Info: Bt261 30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller The Bt261 HSYNC Line Lock Controller is designed specifically for image capture applications. Either composite video or TTL composite sync information is input via VIDEO. An internal sync separator separates horizontal and vertical sync information. Programmable horizontal and vertical video timing enables recovery of

model 74HC4046

Abstract: 74HC4046 application note 74HC4046 BT261KPJ Bt261 MC4024 pll MN3106 MC-40 Bt218
Contextual Info: The Bt261 HSYNC Line Lock Controller is designed specifically for image cap­ ture applications. Either composite video or TTL composite sync information is input via VIDEO. An internal sync separator separates horizontal and vertical sync infor­ mation. Programmable horizontal and vertical video timing enables recovery of

Contextual Info: HSP43124 D ata S h ee t M ay 1999 Serial I/O Filter Features The Serial I/O Filter is a high performance filter engine that is ideal for off loading the burden of filter processing from a DSP microprocessor. It supports a variety of multistage filter configurations based on a user programmable filter and fixed

Contextual Info: H A R R HSP43481 IS S E M I C O N D U C T O R Digital Filter January 1994 Features Description • Four Filter Cells The HSP43481 is a video-speed Digital Filter DF designed to efficiently implement vector operations such as FIR digital filters. It is comprised of four filter cells cascaded internally

Contextual Info: H A RR IS S E M I C O N D SE CT OR ’ ••'E: d 4305271 D 0 m i4M0 4 H S P 43481 HARRIS PRELIMINARY Digital Filter January 1989 Features Description • Four Filter Cells The HSP43481 is a video-speed Digital Filter DF designed to efficiently implement vector operations such as

Contextual Info: SONY CXK77Q36162GB 25/27/3 Preliminary 16Mb DDR1 HSTL High Speed Synchronous SRAM 512K x 36 Description The CXK77Q36162GB is a high speed CMOS synchronous static RAM with common I/O pins, organized as 524,288 words by 36 bits. This synchronous SRAM integrates input registers, high speed RAM, output registers, and a two-deep write buffer

Contextual Info: HSP43891 H A R R IS S E M I C O N D U C T O R Digital Filter January 1994 Features Description • • • • The HSP43891 is a video-speed Digital Filter DF designed to efficiently implement vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded internally

5962F9676701VPC

Abstract: 5962F9676701VXC HS-1135RH HS9-1135RH-Q Q5962F96 marking QX5
Contextual Info: HS-1135RH Data Sheet April 6, 2009 Radiation Hardened, High Speed, Low Power Current Feedback Amplifier with Programmable Output Limiting The HS-1135RH is a radiation hardened, high speed, low power current feedback amplifier built with Intersil’s proprietary complementary bipolar UHF-1 DI bonded wafer