LVDS Search Results

a13h

Contextual Info: CH7017A Chrontel CH7017 TV Encoder / LVDS Transmitter Features 1.0 General Description TV-Out: • VGA to TV conversion supporting up to 1024x768 pixels. • Macrovision 7.1.L1 copy protection support. • Two variable-voltage digital input ports. • Simultaneous LVDS and TV output.

USC32

Contextual Info: CH7018A Chrontel CH7018A TV Encoder / LVDS Transmitter Features 1.0 General Description TV-Out: • VGA to TV conversion supporting up to 1024x768 pixels. • CH7018A is non- Macrovision version . • Two variable-voltage digital input ports. • Simultaneous LVDS and TV output.

Contextual Info: BCM8128 PRODUCT Brief M U LT I - R AT E B C M 8 1 2 8 10-Gbps SONET/SDH/10GE/FEC S U M M A R Y F E AT U R E S • 10-Gigabit MSA Multi-Source Agreement compliant Fully integrated 9.953/10.3125/10.664/10.709 GHz clock • multiplication unit (CMU) 16:1 multiplexer with LVDS

Contextual Info: BCM8501 PRODUCT Brief STS-192c/STM-64c B C M 8 5 0 1 POS FRAMER S U M M A R Y F E AT U R E S 16-bit 622-Mbps LVDS line interface compliant with • SFI-4 64-bit 200MHz HSTL system interface compliant with • SPI-4/Phase1 16-bit generic microprocessor interface for device

Contextual Info: 0603 COMMON MODE CHOKES Common Mode Chokes for Critical Applications • Designed for high-speed USB 3.0, HDMI, SATA, IEEE1394 and LVDS applications. • Supports data rates up to 4.8 Gbit/s. • Miniature EIA 0603 footprint; only 1.17 mm tall • Most values provide >15 dB common mode attenuation and

Contextual Info: DS90CR483,DS90CR484 DS90CR483 / DS90CR484 48-Bit LVDS Channel Link SER/DES — 33 - 112 MHz Literature Number: SNLS047G DS90CR483 / DS90CR484 48-Bit LVDS Channel Link SER/DES — 33 - 112 MHz General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL

Contextual Info: DS90LV018A DS90LV018A 3V LVDS Single CMOS Differential Line Receiver Literature Number: SNLS014C DS90LV018A 3V LVDS Single CMOS Differential Line Receiver General Description Features The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to

Contextual Info: SN65LVCP23 www.ti.com SLLS554E – NOVEMBER 2002 – REVISED MAY 2006 2x2 LVPECL CROSSPOINT SWITCH FEATURES • • • • • • • • • • High Speed 2x2 LVPECL Crosspoint Switch LVDS Crosspoint Switch Available in SN65LVCP22 50 ps Typ , of Peak-to-Peak Jitter With

Contextual Info: DS90CF383 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link-65 MHz Literature Number: SNLS005 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link— 65 MHz General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL

Contextual Info: DAC3282 www.ti.com SLAS646B – DECEMBER 2009 – REVISED MAY 2012 16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter DAC Check for Samples: DAC3282 FEATURES DESCRIPTION • • The DAC3282 is a dual-channel 16-bit 625 MSPS digital-to-analog converter (DAC) with an 8-bit LVDS

Contextual Info: SN65LVCP22 www.ti.com SLLS553B – NOVEMBER 2002 – REVISED JUNE 2003 2x2 LVDS CROSSPOINT SWITCH FEATURES • • • • • • • • • • • • • High Speed >1000 Mbps Upgrade for DS90CP22 2x2 LVDS Crosspoint Switch LVPECL Crosspoint Switch Available in

Contextual Info: SY89645L Precision Low Skew, 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer General Description The SY89645L is a 3.3V, fully differential, low skew, 1:4 LVDS fanout buffer that accepts LVTTL or LVCMOS inputs. It is capable of processing clock signals as fast as

Contextual Info: 2.5V, 3.2Gbps DUAL, DIFFERENTIAL 2:1 LVDS MULTIPLEXER WITH INTERNAL TERMINATION Micrel, Inc. Precision Edge SY89542U ® Precision Edge SY89542U FEATURES Dual 2:1 multiplexer Guaranteed AC performance over temp and voltage: • DC-to > 3.2Gbps data rate throughput

Contextual Info: SY58605U 3.2Gbps Precision, LVDS Buffer with Internal Termination and Fail Safe Input General Description The SY58605U is a 2.5V, high-speed, fully differential LVDS buffer optimized to provide less than 10pspp total jitter. The SY58605U can process clock signals as fast

Agilent a2020

Contextual Info: PL620-80 Low Phase Noise XO 9.5-65MHz Output DIE CONFIGURATION FEATURES XIN OUTSEL0^ VDD VDD VDD VDD N/C Reserved OUTSEL1^ 24 23 22 21 20 19 18 17 26 Die ID: A2020-20B XOUT 27 N/C 28 S2^ 29 OE CTRL 30 N/C 31 C502A 16 CMOS 15 LVDSB 14 PECLB 13 12 VDDBUF VDDBUF

Contextual Info: SY89537L 3.3V Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer General Description The SY89537L integrated programmable clock synthesizer and fanout is part of a precision PLLbased clock generation family optimized for enterprise

Contextual Info: Precision Edge 2.5V, 2GHz ANY DIFF. IN-TO-LVDS ® SY89872U Precision Edge PROGRAMMABLE CLOCK DIVIDER/ SY89872U FANOUT BUFFER W/INTERNAL TERMINATION Micrel, Inc. FEATURES • Guaranteed AC performance over temperature and voltage: • >2GHz fMAX • < 750ps tPD matched delay between banks

Contextual Info: Precision Edge SY89545L ® 3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with INTERNAL INPUT TERMINATION Micrel, Inc. Precision Edge SY89545L FEATURES „ Selects among four differential inputs „ Guaranteed AC performance over temp and voltage: • DC-to > 3.2Gbps data rate throughput

Contextual Info: SY89538L 3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay General Description The SY89538L integrated programmable clock synthesizer and fanout is part of a precision PLLbased clock generation family optimized for

Contextual Info: SY89465U Precision LVDS 1:10 Fanout with 2:1 Runt Pulse Eliminator MUX and Internal Termination General Description The SY89465U is a low jitter, 1:10 LVDS fanout buffer with a 2:1 differential input multiplexer MUX optimized for redundant source switchover

Contextual Info: 3.3V, 2GHz ANY-DIFFERENTIAL Precision Edge INPUT-TO-LVDS 1:4 FANOUT BUFFER/ SY89833L FINAL TRANSLATOR W/ INTERNAL TERMINATION FEATURES • Accepts any differential input signal and provides four LVDS output copies ■ Guaranteed AC performance over temperature

Contextual Info: SY89838U Precision 1:8 LVDS Clock Fanout Buffer with 2:1 Runt Pulse Eliminator Input MUX General Description The SY89838U is a low jitter, low skew, high-speed 1:8 fanout buffer with a unique, 2:1 differential input multiplexer MUX optimized for redundant source

Contextual Info: D S 25B R 120 DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis Texa s In s t r u m e n t s Literature Number: SNLS256D t DS25BR120 Semiconductor 3.125 Gbps LVDS Buffer with Transm it Pre-Emphasis General Description Features The DS25BR120 is a single channel 3.125 Gbps LVDS buffer

Contextual Info: D S 90C P 04 DS90CP04 1.5 Gbps 4x4 LVDS Crosspoint Switch Texas In s t r u m e n t s Literature Number: SNLS154H £/r December 12, 2007 Na t i on a l Semiconductor DS90CP04 1.5 Gbps 4x4 LVDS Crosspoint Switch General Description Features DS90CP04 is a 4x4 digital cross-point switch with broadside