ULTRA37064 Search Results

vp44

Contextual Info: PRELIMINARY J ^ m n rn n : if : Y H Ultra37064V - UltraLogic 3.3V 64-Macrocell ISR™CLPD — tPD = 10 ns Features — ts = 5.5 ns • 64 macrocells in four logic blocks — tco = 6.5 ns • 3.3V In-System Reprogrammable™ ISR™ • Product-term clocking

Contextual Info: PRESS RELEASE CYPRESS'S NEW CPLD FAMILY IS SIMPLY THE WORLD'S FASTEST Devices from 32 to 512 Macrocells Offer Worst-Case Delays as Low as 5 ns, Cypress ISR SAN JOSE, Calif., May 11, 1998 - Cypress Semiconductor NYSE:CY today unveiled a new family of Complex Programmable Logic Devices (CPLDs) that offers unparalleled speed,

CY37256

Abstract: CY37384 CY37512 CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37192
Contextual Info: Power Estimation and Thermal Management for Cypress CPLDs Introduction The amount of power consumed by a programmable logic device is dependent upon the design’s utilization of its resources. Understanding the architecture of the device is the first step in estimating a design’s power consumption. In the