TTL IC PARAMETER Search Results

signal path designer

Contextual Info: PRELIMINARY D E V IC E S P E C IF IC A T IO N 320000 SERIES ECL/TTL "TURBO" LOGIC ARRAYS 020000 FEATURES PERFORMANCE SUMMARY PARAMETER Typical gate delay* Maximum toggle frequency Maximum TTL input frequency Maximum TTL output frequency Maximum ECL input frequency

ic 3525 internal block diagram

Abstract: ic 3525
Contextual Info: SYNERGY SINGLE SUPPLY OCTAL PECL/TTL-tO -TTL C'° SY100H646 S E M IC O N D U C T O R FEATURES PECL/TTL-to-TTL version of popular ECLinPS El 11 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification Three-state enable

max232 rts cts

Abstract: TTL-232R-3V3 cmos 3v3 TTL232R-3V3 FT232RQ FT232R USB UART ttl drive USB CABLE MAX232 for level converter notes on serial communication MAX232
Contextual Info: Future Technology Devices International Ltd. TTL-232R-3V3 USB to TTL Serial Converter Cable The TTL-232R-3V3 is a USB to TTL serial converter cable incorporating FTDI’s FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI’s range of USB UART interface Integrated Circuit Devices. It

Contextual Info: MBM93419 FUJITSU M IC R O E L E C T R O N IC S . INC. TTL 576-BIT BIPOLAR RANDOM ACCESS MEMORY DESCRIPTION The Fujitsu MBM93419 is a high speed TTL read/write randomaccess memory, organized as 64 words by 9 bits, with opencollector outputs. M BM93419 is packaged in a

Contextual Info: « 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise

Contextual Info: * 9-BIT LATCHED ECL-TO -TTL SYNERGY SY10H603 SY100H603 S E M IC O N D U C T O R FEATURES DESCRIPTION 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply

Contextual Info: *SYNERGY SINGLE SUPPLY QUAD PECL-TO-TTL WITH OUTPUT ENABLE S E M IC O N D U C T O R DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise

Contextual Info: O SING LE SUPPLY PEC L-TTL 1:4 C LO C K DRIVER SYNERGY S E M IC O N D U C T O R FEATURES S Y ^o'lo'ohS l DESCRIPTION • Translates positive ECL to TTL PECL-TTL The SY10H841 and SY100H841 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24m A TTL output stage, with AC

Contextual Info: * SINGLE SUPPLY QUAD PECL-TO-TTL WITH O UTPUT ENABLE SYNERGY S E M IC O N D U C T O R Clockworks SY10H841 SY100H841 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise

Contextual Info: SINGLE_SUPPLY PECL-TTL 1:4 CLOCK DRIVER SYNERGY p rE f LIM m m IN IIIII rv PR AR Y SY1Q 1D0H843 SEM IC O N D U C TO R DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-TTL ■ 300ps pln-to-pin skew ■ Guaranteed skew spec ■ Differential internal design for Increased noise

CY101E383

Abstract: diode SKE 39
Contextual Info: W r CY10E383 CY101E383 CYPRESS ECL/TTL/ECL Translator and High-Speed Bus Driver Features Functional Description • B iC M O S for optim um speed/power • H igh speed max. — 2.5 n s Ipu TTL-to-EC L — 3.5 n s tpo EC L-to-TTL The CY10/101E383 is a new-generation

Contextual Info: V SYNERGY Clockworks SY10ELT23 SY100ELT23 DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR S E M IC O N D U C T O R DESCRIPTION FEATURES 3.0ns typical propagation delay <500ps typical output-to-output skew Differential PECL outputs 24mA TTL outputs Flow-through pinouts

Contextual Info: A V 3.3V SINGLE SUPPLY QUAD pF r| SYNERGY C lockworks PRELIMINARY SY10H841L SY100H841L T n T T | W |T H PECL-TO-TTL WITH OUTPUT ENABLE S E M IC O N D U C T O R DESCRIPTION FEATURES • 3.3V power supply ■ Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew

Contextual Info: fax id: 5000 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Featu res • B iC M O S for optimum speed/p ow er • High speed max. — 3.0 ns tpD TTL-to-ECL — 4 ns t PD ECL-to-TTL • Low skew < ± 1 ns • Can o perate on single +5V supply

Contextual Info: IC BUILT-IN PHOTODIODE PH502HR FEATURES DESCRIPTION_ • SCHMIDT TRIGGER CIRCUIT INCORPORATED • LOW THRESHHOLD IRRADIANCE Huh = 50 nW/cm2 MAX • DIRECT CONNECTION WITH TTL, LSTTL, AND CMOS ALLOWED The PH502HR is a digital-output light receiving IC, integrating

kp7010

Contextual Info: PRODUCT SPECIFICATION cosmo Photocoupler KP7010 ELECTRONICS CO.,LTD. SHEET 1 OF 5 High Reliability Digital Output IC PHOTO IC Photocoupler • Features 1. High sensitivity. 2. TTL and LSTTL compatible output. 3. Operating supply voltage range. Vcc 4. 5V to 17V

Contextual Info: PRODUCT SPECIFICATION cosmo Photocoupler KP7110 ELECTRONICS CO.,LTD. SHEET 1 OF 5 High Reliability Digital Output IC PHOTO IC Photocoupler • Features 1. High sensitivity. 2. TTL and LSTTL compatible output. 3. Operating supply voltage range. Vcc 4. 5V to 17V

Contextual Info: * 9-B IT TTL.-T O-E CL W IT H SYNERGY l o OHBOO TTL. E C L E N A B L E mn o HB OO S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize

Contextual Info: Issued July 1983 004-923 Data Pack H 575 MHz ÷ 10/11 prescaler IC Data Sheet RS stock number 302-378 The 8680 is an ECL emitter coupled logic prescaling counter with both ECL 10K and TTL compatible outputs. The circuit will operate from either ECL or TTL

Contextual Info: data W3 \v delayW deviccsYinc. Ta s t Log ic Programmable Delay Units SERIES: PDU-15F 5 Bit T T L Interfaced Specifications: Features: • Input & Output TTL buffered ■ 5-B it TTL program m able delay line ■ Two (2) Separate outputs; inverting and non-inverting.

divide-by-10

Contextual Info: Issued March 1997 232-2598 Data Pack H 575 MHz ÷ 10/11 prescaler IC Data Sheet RS stock number 302-378 The 8680 is an ECL emitter coupled logic prescaling counter with both ECL 10K and TTL compatible outputs. The circuit will operate from either ECL or TTL

ELM7S04

Abstract: elm7sxx 74HC ELM7S00 ELM7S02 ELM7S08 ELM7S32 ELM7S66 ELM7S86 ELM7SU04
Contextual Info: ELM7Sxx SERIES CMOS LOGIC IC • GENERAL DESCRIPTION ・ELM7S Series is a Silicon CMOS’s High-Speed Gate IC. It realizes High-Speed drive similar to LS-TTL with lower power consumption which CMOS features. Inner Circuit which consists of 3-phase composition

Contextual Info: m PlnrkWrtrkc 3.3V SINGLE SUPPLY 1 :9 PECL-TO-TTL SYNERGY PRELIMINARY SY10H641L SY100H641 L S E M IC O N D U C T O R FEATURES DESCRIPTION • 3.3V power supply ■ PECL-to-TTL version of popular ECLinPS E111 ■ Guaranteed low skew specification ■ Latch

Contextual Info: * 9-BIT LATCHED TTL-TO-ECL SYNERGY SY10H602 SY100H602 S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ Dual supply