SY10H600JCTR Search Results
SY10H600JCTR Datasheets (4)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| SY10H600JCTR | Micrel Semiconductor | 9 Bit TTL-to-ECL with TTL, ECL Enable Translator | Original | 64.05KB | 4 | ||
| SY10H600JCTR | Micrel Semiconductor | 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE | Original | 69.86KB | 4 | ||
| SY10H600JC-TR | Microchip Technology | Integrated Circuits (ICs) - Logic - Translators, Level Shifters - IC TRNSLTR UNIDIRECTIONAL 28PLCC | Original | 499.54KB | |||
| SY10H600JCTR | Synergy Semiconductor | 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE | Scan | 54.7KB | 2 |
SY10H600JCTR Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
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Contextual Info: * 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs |
OCR Scan |
sy10h600sy100h600sy10/100h60028-lead+4 | |
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Contextual Info: * 9-B IT TTL.-T O-E CL W IT H SYNERGY l o OHBOO TTL. E C L E N A B L E mn o HB OO S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize |
OCR Scan |
10hxxxmc10h/100h60028-pin10/100h+6 | |
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Contextual Info: * 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 SEMICONDUCTOR FEATURES • ■ 9-bit ideal for byte-parity applications DESCRIPTION The SY10/100H600 are 9-bit, dual supply TTL-to-EC L translators. Devices in the Synergy 9-bit translator series |
OCR Scan |
sy10h600sy100h600sy10/100h60028-lead | |
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Contextual Info: SY10H600 SY100H600 FINAL 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs |
Original |
sy10h600sy100h60010hxxx100hxxx+6 | |
synergy series
Abstract: H600 SY100H600 SY10H600 SY10H600JC 10Hxxx
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OCR Scan |
sy10h600sy100h60010hxxx100hxxx+8 | |
H600
Abstract: SY100H600 SY10H600 SY10H600JC SY10H600JCTR MECL10KH
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Original |
sy10h600sy100h60010hxxx100hxxx+9 | |
H600
Abstract: SY100H600 SY10H600 SY10H600JC SY10H600JCTR
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Original |
sy10h600sy100h600sy10/100h60028-lead+4 | |
H600
Abstract: SY100H600 SY10H600 SY10H600JC
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Original |
sy10h600sy100h60010hxxx100hxxx+6 | |
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Contextual Info: * 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 SEMICONDUCTOR FEATURES • ■ 9-bit ideal for byte-parity applications DESCRIPTION The SY10/100H600 are 9-bit, dual supply TTL-to-EC L translators. Devices in the Synergy 9-bit translator series |
OCR Scan |
sy10h600sy100h600sy10/100h60028-lead+1 | |
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Contextual Info: « 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise |
OCR Scan |
sy10h600sy100h60010hxxx100hxxx+6 | |
dsq8Contextual Info: * 9-B IT T TL-TO -E C L W ITH TTL, ECL ENABLE SYNERG Y SY10H600 SY100H600 SEMICONDUCTOR FEATURES DESCRIPTION 9-bit ideal for byte-parity applications Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise ECL and TTL enable inputs |
OCR Scan |
sy10h600sy100h60010hxxx100hxxx+4 |