TTL IC Search Results

ic 3525 internal block diagram

Abstract: ic 3525
Contextual Info: SYNERGY SINGLE SUPPLY OCTAL PECL/TTL-tO -TTL C'° SY100H646 S E M IC O N D U C T O R FEATURES PECL/TTL-to-TTL version of popular ECLinPS El 11 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification Three-state enable

max232 rts cts

Abstract: TTL-232R-3V3 cmos 3v3 TTL232R-3V3 FT232RQ FT232R USB UART ttl drive USB CABLE MAX232 for level converter notes on serial communication MAX232
Contextual Info: Future Technology Devices International Ltd. TTL-232R-3V3 USB to TTL Serial Converter Cable The TTL-232R-3V3 is a USB to TTL serial converter cable incorporating FTDI’s FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI’s range of USB UART interface Integrated Circuit Devices. It

Contextual Info: O SYNERGY SEMICONDUCTOR 3.3V SINGLE SUPPLY OCTAL PECL/TTL-TO-TTL PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE Guaranteed low skew specification Three-state enable Differential internal design V bb output for single-ended operation Extra TTL and ECL power/ground pins

HLT28

Abstract: HT28 KLT28 KT28 MC100ELT28 MC10ELT28 MC10ELT28D
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading

Contextual Info: * SYNERGY SEMICONDUCTOR SINGLE SUPPLY OCTAL PECL/TTL-to-TTL FEATURES PECL/TTL-to-TTL version of popular ECLinPS E111 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification Three-state enable Differential internal design

Contextual Info: VJU_ _ _ V SINGLE SUPPLY OCTAL PECL/TTL-tO-TTL SYNERGY ^ * 1 0 ^ SY100H646 SEMICONDUCTOR FEATURES DESCRIPTION PECL/TTL-to-TTL version of popular ECLinPS E111 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification

Contextual Info: IDT74GTLP816 GTLP / TTL 1:2 / 1:6 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE GTLP/TTL 1:2/1:6 CLOCK DRIVER FEATURES: • • • • • • • • DESCRIPTION: 5V or 3.3V operation Interface between GTLP and TTL logic levels GTLP to TTL 1:6 fanout TTL to GTLP 1:2 fanout

Contextual Info: O SING LE SUPPLY PEC L-TTL 1:4 C LO C K DRIVER SYNERGY S E M IC O N D U C T O R FEATURES S Y ^o'lo'ohS l DESCRIPTION • Translates positive ECL to TTL PECL-TTL The SY10H841 and SY100H841 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24m A TTL output stage, with AC

XEL28

Abstract: marking k8 diode
Contextual Info: 5V TTL-TO-DIFFERENTIAL PECL AND DIFFERENTIAL PECL-TO-TTL TRANSLATOR FEATURES SY10ELT28 SY100ELT28 FINAL DESCRIPTION • Guaranteed AC parameters over temperature: • fMAX > 160MHz TTL • < 5.5ns PECL-to-TTL propagation delay • < 1.5ns tr / tf; PECL output

H600

Abstract: SY100H646L SY10H646L
Contextual Info: 3.3V SINGLE SUPPLY OCTAL PECL/TTL-TO-TTL Micrel, Inc. Precision Edge SY10H646L ® Precision SY100H646L Edge SY10H646L SY100H646L FEATURES • 3.3V power supply ■ PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE ■ Guaranteed low skew specification

MC10ELT/100ELT28

Abstract: DL140 MC100ELT28 MC10ELT28
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information MC10ELT28 TTL to Differential PECL/Differ- MC100ELT28 ential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL

Contextual Info: *SYNERGY PECL/TTL-TTL 1:8 CLOCK DISTRIBUTION CHIP SEMICONDUCTOR FEATURES Clockworks PRELIMINARY SY10/100H646 DESCRIPTION • PECL/TTL-TTL version of popular ECLinPS E111 ■ Meets specifications required to drive highperformance x86 processors ■ Guaranteed low skew specification

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information TTL to Differential PECL/Differential PECL to TTL Translator MC10ELT28 MC100ELT28 The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL

Contextual Info: V C lockworks PRELIMINARY 3.3V SINGLE SUPPLY OCTAL PECL/TTL-to-TTL SYNERGY SEMICONDUCTOR FEATURES SY100H646L DESCRIPTION 3.3V power supply PECL/TTL-to-TTL version of popular ECLinPS E111 Guaranteed low skew specification Three-state enable Differential internal design

signal path designer

Contextual Info: PRELIMINARY D E V IC E S P E C IF IC A T IO N 320000 SERIES ECL/TTL "TURBO" LOGIC ARRAYS 020000 FEATURES PERFORMANCE SUMMARY PARAMETER Typical gate delay* Maximum toggle frequency Maximum TTL input frequency Maximum TTL output frequency Maximum ECL input frequency

H600

Abstract: SY100H646L SY10H646L SY10H646LJC
Contextual Info: ClockWorks SY10H646L SY100H646L 3.3V SINGLE SUPPLY OCTAL PECL/TTL-TO-TTL FEATURES DESCRIPTION • 3.3V power supply ■ PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE ■ Guaranteed low skew specification ■ Three-state enable ■ Differential internal design

Contextual Info: ClockWorks SY10H646L SY100H646L FINAL 3.3V SINGLE SUPPLY OCTAL PECL/TTL-TO-TTL FEATURES DESCRIPTION • 3.3V power supply ■ PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE ■ Guaranteed low skew specification ■ Three-state enable ■ Differential internal design

Contextual Info: SY10H600 SY100H600 FINAL 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs

Contextual Info: V Clockworks PRELIMINARY 3.3V SINGLE SUPPLY OCTAL SYNERGY SEMICONDUCTOR PECL/TTL-TO-TTL FEATURES 3.3V power supply PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE Guaranteed low skew specification Three-state enable Differential internal design V bb output for single-ended operation

Contextual Info: * 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs

Contextual Info: « 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise

Contextual Info: * 9-BIT LATCHED ECL-TO -TTL SYNERGY SY10H603 SY100H603 S E M IC O N D U C T O R FEATURES DESCRIPTION 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply

KLT28

Abstract: HLT28 HT28 KT28 MC100ELT28 MC10ELT28 transistor k 4110
Contextual Info: MC10ELT28, MC100ELT28 5V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

H600

Abstract: SY100H600 SY10H600 SY10H600JC SY10H600JCTR MECL10KH
Contextual Info: 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE FEATURES SY10H600 SY100H600 DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs ■ Dual supply