TTL ECL Search Results

Contextual Info: O SYNERGY SEMICONDUCTOR 3.3V SINGLE SUPPLY OCTAL PECL/TTL-TO-TTL PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE Guaranteed low skew specification Three-state enable Differential internal design V bb output for single-ended operation Extra TTL and ECL power/ground pins

Contextual Info: * SYNERGY SEMICONDUCTOR SINGLE SUPPLY OCTAL PECL/TTL-to-TTL FEATURES PECL/TTL-to-TTL version of popular ECLinPS E111 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification Three-state enable Differential internal design

Contextual Info: VJU_ _ _ V SINGLE SUPPLY OCTAL PECL/TTL-tO-TTL SYNERGY ^ * 1 0 ^ SY100H646 SEMICONDUCTOR FEATURES DESCRIPTION PECL/TTL-to-TTL version of popular ECLinPS E111 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification

H600

Abstract: SY100H646L SY10H646L
Contextual Info: 3.3V SINGLE SUPPLY OCTAL PECL/TTL-TO-TTL Micrel, Inc. Precision Edge SY10H646L ® Precision SY100H646L Edge SY10H646L SY100H646L FEATURES • 3.3V power supply ■ PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE ■ Guaranteed low skew specification

Contextual Info: *SYNERGY PECL/TTL-TTL 1:8 CLOCK DISTRIBUTION CHIP SEMICONDUCTOR FEATURES Clockworks PRELIMINARY SY10/100H646 DESCRIPTION • PECL/TTL-TTL version of popular ECLinPS E111 ■ Meets specifications required to drive highperformance x86 processors ■ Guaranteed low skew specification

9434

Abstract: CY101E383 EME-6300H
Contextual Info: Reliability Report QTP# 94346/95255, Version 1.0 June, 1996 BiCMOS ECL-TTL/TTL-ECL TRANSLATOR MARKETING PART NUMBERS DESCRIPTION CY101E383 ECL/TTL/ECL Translator and High Speed Bus Driver CY10E383 ECL/TTL/ECL Translator and High Speed Bus Driver CYPRESS SEMICONDUCTOR

Contextual Info: V C lockworks PRELIMINARY 3.3V SINGLE SUPPLY OCTAL PECL/TTL-to-TTL SYNERGY SEMICONDUCTOR FEATURES SY100H646L DESCRIPTION 3.3V power supply PECL/TTL-to-TTL version of popular ECLinPS E111 Guaranteed low skew specification Three-state enable Differential internal design

H600

Abstract: H646 SY100H646L SY10H646L
Contextual Info: Clockworks 3.3V SINGLE SUPPLY OCTAL PECL/TTL-tO-TTL SYNERGY SEM ICONDUCTOR FEATURES PRELIMINARY SY10H646L SY100H646L DESCRIPTION I 3.3V power supply I PECL/TTL-to-TTL version o f popular ECLinPS E111 I Guaranteed low skew specification I Three-state enable

H600

Abstract: SY100H646L SY10H646L SY10H646LJC
Contextual Info: ClockWorks SY10H646L SY100H646L 3.3V SINGLE SUPPLY OCTAL PECL/TTL-TO-TTL FEATURES DESCRIPTION • 3.3V power supply ■ PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE ■ Guaranteed low skew specification ■ Three-state enable ■ Differential internal design

Contextual Info: ClockWorks SY10H646L SY100H646L FINAL 3.3V SINGLE SUPPLY OCTAL PECL/TTL-TO-TTL FEATURES DESCRIPTION • 3.3V power supply ■ PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE ■ Guaranteed low skew specification ■ Three-state enable ■ Differential internal design

Contextual Info: SY10H600 SY100H600 FINAL 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs

Contextual Info: V Clockworks PRELIMINARY 3.3V SINGLE SUPPLY OCTAL SYNERGY SEMICONDUCTOR PECL/TTL-TO-TTL FEATURES 3.3V power supply PECL/TTL-to-TTL version of popular ECLinPS E111AE/LE Guaranteed low skew specification Three-state enable Differential internal design V bb output for single-ended operation

Contextual Info: * 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs

KLT28

Abstract: HLT28 HT28 KT28 MC100ELT28 MC10ELT28 transistor k 4110
Contextual Info: MC10ELT28, MC100ELT28 5V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

Contextual Info: « PECL/TTL-TTL 1:8 CLOCK DISTRIBUTION CHIP C V M C O rV SEMICONDUCTOR FEATURES Clockworks PRELIMINARY SY10/100H646 DESCRIPTION • PECL/TTL-TTL version of popular ECLìnPS E111 ■ Meets specifications required to drive highperformance x86 processors ■ Guaranteed low skew specification

ic 3525 internal block diagram

Abstract: ic 3525
Contextual Info: SYNERGY SINGLE SUPPLY OCTAL PECL/TTL-tO -TTL C'° SY100H646 S E M IC O N D U C T O R FEATURES PECL/TTL-to-TTL version of popular ECLinPS El 11 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification Three-state enable

Contextual Info: * 9-BIT ECL-TO-TTL WITH 3-STATE ENABLE SYNERGY SY10H 601 SY100H601 SEMICONDUCTOR DESCRIPTION FEATURES 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise ECL and TTL 3-state control inputs

klt28

Abstract: MC10ELT28 HLT28
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

KLT28

Abstract: kt28 HLT28 HT28 MC100ELT28 MC10ELT28
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

Contextual Info: * SYNERG Y 9-BIT ECL-TO-TTL WITH 3-STATE ENABLE SY10H601 SY100H601 SEMICONDUCTOR DESCRIPTION FEATURES 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise ECL and TTL 3-state control inputs

CY101E383

Abstract: E383 R2170 ecl 84
Contextual Info: E383 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features • BiCMOS for optimum speed/power • High speed max. — 3.0 ns tPD TTL-to-ECL Functional Description The CY101E383 is a new-generation TTL-to-ECL and ECL-to-TTL logic level translator designed for high-perfor-

SY100H841

Abstract: SY100H841ZC SY10H841 SY10H841ZC SY10H841ZCTR
Contextual Info: ClockWorks SY10H841 ClockWorks™ SY100H841 SINGLE SUPPLY QUAD PECL-TO-TTL WITH OUTPUT ENABLE SYNERGY SEMICONDUCTOR SYNERGY SEMICONDUCTOR SY10H841 SY100H841 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew

SY100H842

Abstract: SY100H842ZC SY10H842 SY10H842ZC SY10H842ZCTR
Contextual Info: SINGLE SUPPLY QUAD PECL-TO-TTL WITH LATCHED OUTPUT ENABLE SYNERGY SEMICONDUCTOR SYNERGY SEMICONDUCTOR ClockWorks SY10H842 ClockWorks™ SY100H842 SY10H842 SY100H842 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew

HLT28

Abstract: HT28 KLT28 KT28 MC100ELT28 MC10ELT28 MC10ELT28D
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading