TTL 7440
Abstract: 9N38 74H40 74S140 74S40 9H40 9N37 9N40 9S40 TTL 7437
Contextual Info: 6006 74H40 9H 40/ 9N 37/ 7437 9N 38/ 7438 9N 40/ 7440 74S40 9S 40/ 74S140 96101 Dual 2-NAND Driver Any TTL Quad 2-NAND Driver Any TTL Any TTL Dual 2-NAND Driver Any TTL Quad 2-NAND Driver Dual 2-NAND Driver Any TTL 96 106 Any TTL Dual 2-NAND Driver 50 0 Driver
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74h40o-86a74s4074s140+7ttl 74409n389h409n379n409s40ttl 7437
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740L6000
Abstract: transistor c2026 c2026 c2026 transistor data 740L6010 transistor equivalent c2026 740L6011 C2026 TRANSISTOR 740L6001 c2037
Contextual Info: HIGH-SPEED LOGIC-TO’LOGIC OPTOCOUPLERS OPTOELECTRONICS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTLto ORDER INFORMATION LOGIC COMPATIBILITY PART NUMBER INPUT OUTPUT TTL 740L6000 LSTTL TTL 740L6001 LSTTL CMOS 740L6010 LSTTL CMOS 740L6011 LSTTL
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740l6000740l6001740l6010740l6011+6transistor c2026c2026c2026 transistor datatransistor equivalent c2026c2026 transistorc2037
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SN7401
Abstract: sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c
Contextual Info: INDEX PAGE TTL Integrated Circuits Mechanical Data 1 TTL Interchangeability Guide 6 Functional Selection Guide 19 Explanation of Function Tables 38 54/74 Families of Compatible TTL Circuits 40 TTL INTEGRATED CIRCUITS MECHANICAL DATA J ceramic dual-in-line package
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24-leadsn74s474sn54s475sn74s475+16sn54s482sn74s482lcc4270sn54490sn74490sn54ls490sn7401sn29601sn7449sn74298sn74265mc3021sn54367sn74142signetics 82239370c
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TTL LS 7400
Abstract: 74 LS 00 Logic Gates Advanced Schottky Family 4 bit barrel shifter LS 00 Logic Gates ls 7400 7400 ls 74lsxxx TTL 7400 LS TTL family characteristics
Contextual Info: Selection Information FAST/LS TTL FAST AND LS TTL 1 GENERAL INFORMATION TTL in Perspective FAST is manufactured on Motorola’s MOSAIC oxideisolated process.This process provides FAST with inherent speed/power advantages over the older junction-isolated 74S
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ttl ls 740074 ls 00 logic gatesadvanced schottky family4 bit barrel shifter+6ls 00 logic gatesls 74007400 ls74lsxxxttl 7400ls ttl family characteristics
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2n2222 fairchild
Abstract: 74OL60XX
Contextual Info: 74OL6000, 74OL6001, 74OL6010, 74OL6011 Optoplanar High-Speed Logic-to-Logic Optocouplers LSTTL to TTL Buffer TTL Inverter CMOS Buffer CMOS Inverter Description 74OL6000 74OL6001 74OL6010 74OL6011 Features • Industry first LSTTL to TTL and LSTTL to CMOS
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transistor c2026
Abstract: c2026 transistor data 740L6000 c2028 transistor data C2036 c2026 transistor equivalent c2026 C2037 transistor C2003 740L6000 equivalent
Contextual Info: eu HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS OPTOELECTRONICS OPTO/LOGIC TTL BUFFER TTLINVERTER CMOS BUFFER CMOS INVERTER LSTTL to \ TM ORDER INFORMATION LOGIC COMPATIBILITY PART NUMBER INPUT OUTPUT 740L6000 LSTTL TTL TTL 740L6001 TTL 740L6010 LSTTL CMOS 740L6011 LSTTL
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740l6000740l6001740l6010740l6011+9transistor c2026c2026 transistor datac2028 transistor datac2036c2026transistor equivalent c2026c2037transistor c2003740l6000 equivalent
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AI3D-12
Abstract: AI3D-15 AI3D-20 AI3D-25 AI3D-30 AI3D-35 AI3D-10 AI3D-11
Contextual Info: AI3D Series FAST / TTL Buffered Triple Independent Delays Electrical Specifications at 25OC 14-Pin Package Surface Mount and Thru-hole Versions Delay Tolerance ns FAST/TTL Logic Buffered 14-Pin 74F/TTL Buffered Triple Independent Delays DIP P/N G-SMD P/N
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74F707
Contextual Info: ADVANCED INFORMATION National Semiconductor 54F/74F707 400 MHz 8-Bit TTL-ECL Register General Description Features The 'F707 TTL-ECL Shift Register is comprised of an 8-bit transparent holding register with TTL inputs for data and load enable which is translated internally to ECL levels. The
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74F707
Contextual Info: National Semiconductor ADVANCED INFORMATION 54F/74F707 400 MHz 8-Bit TTL-ECL Register General Description Features The 'F707 TTL-ECL Shift Register is comprised of an B-bit transparent holding register with TTL inputs for data and load enable which is translated internally to ECL levels. The
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information TTL to Differential PECL/Differential PECL to TTL TVanslator M C10ELT28 M C100ELT28 The MC1OELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information TTL to D ifferential PECL/Differential PECL to TTL Translator M C10ELT28 M C100ELT28 The MC1OELT/1O0ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL
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F240 transistor
Abstract: TTL LS 7400 Transistor F240 LS00 from Motorola 12MRM IC TTL 7400 propagation delay LS TTL family characteristics 7400 TTL ls 7400 LS00
Contextual Info: Circuit Characteristics FAST AND LS TTL 2 CIRCUIT CHARACTERISTICS FAMILY CHARACTERISTICS LS TTL The Low Power Schottky LSTTL family combines a current and power reduction improvement over standard 7400 TTL by a factor of 5. This is accomplished by using Schottky diode clamping to prevent saturation and advanced processing.
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54/74smil-std-883c12mrm3831a+103830af240 transistorttl ls 7400transistor f240ls00 from motorolaic ttl 7400 propagation delayls ttl family characteristics7400 ttlls 7400ls00
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sn75365
Abstract: SN75362 S7001
Contextual Info: FUTURE PRODUCTS AVAILABLE 1ST QTR 74 SN75362 . . . DUAL TTL-TO-MOS DRIVER key features • Dual inverting TTL-to-MOS driver • Versatile interface circuit for use between TTL and high-current, high-voltage systems • Equivalent to 1/2 of SN75365 device but with single input per channel
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IC TTL 74LS00
Abstract: TTL LS 7400 IC TTL 74 ls 04 7400 fan-out cmos 7400 fan-out TTL 7400 catalog TTL 74ls00 TTL 7400 rise and fall time of ic 74ls00 74LS00 gate
Contextual Info: Design Considerations, Testing and Applications Assistance Form FAST AND LS TTL FAST AND LS TTL DATA 3-1 3 DESIGN CONSIDERATIONS SELECTING TTL LOGIC. TTL Families may be mixed in a system for optimum performance. For instance, in new designs, ALS would commonly be used in non-critical speed paths to minimize power consumption while FAST TTL would be used in high
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CY101E383
Abstract: E383 R2170 ecl 84
Contextual Info: E383 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features • BiCMOS for optimum speed/power • High speed max. — 3.0 ns tPD TTL-to-ECL Functional Description The CY101E383 is a new-generation TTL-to-ECL and ECL-to-TTL logic level translator designed for high-perfor-
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740L6010
Abstract: transistor c2002 740L6000 equivalent transistor n 4212 C2036 C2037 transistor c2028 740L6011 c2028 transistor data C2035
Contextual Info: HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS flPTOELECTflQUICS LSTTLto ORDER INFORMATION PART NUMBER 740L6000 740L6001 740L6010 740L6011 TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER 740L6000 740L6001 740L6010 740L6011 FEATURES LOGIC COMPATIBILITY INPUT LSTTL
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740l6000740l6001740l6010740l6011+7transistor c2002equivalent transistor n 4212c2036c2037transistor c2028c2028 transistor datac2035
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7SEG COM ANODE
Abstract: 7-seg 7-seg ANODE COMMON 7seg D143 TTL 74LS48 TTL 7446 decoder 74LS48 7448 decoder decoder 74LS47
Contextual Info: FAIRCHILD INTERFACE DISPLAY DRIVERS Cont'd 5.5 H — 125 D141 4L.6B, 9B 2 5449 7-Seg Decoder TTL Yes Yes No 9.6 5.5 H — 165 D142 3I 3 54LS/ 74LS49 7-Seg Decoder/ TTL Dvr OC Yes Yes No 1.3 5.5 H — 40 D142 3I.6A, 9A 4 9302 1-of-10 OC Dvr TTL Yes No Yes
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decoder 7448
Abstract: BCD D147 D142 7448 decoder mos 9368 decoder 74LS47 7-seg 9317C ttl 74ls48 9317B
Contextual Info: FAIRCHILD INTERFACE DISPLAY DRIVERS Yes Yes No 1.3 5.5 H — 125 D141 4L,6B, 9B 2 5449 7-Seg Decoder TTL Yes Yes No 9.6 5.5 H — 165 D142 3I 3 54LS/ 74LS49 7-Seg Decoder/ TTL Dvr OC Yes Yes No 1.3 5.5 H — 40 D142 3I,6A, 9A 4 9302 1-of-10 OC Dvr TTL Yes
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74ls4874ls499317b9317c+1293l0854s/74s17454ls/74ls17493l38decoder 7448bcd d147d1427448 decodermos 9368decoder 74ls477-segttl 74ls48
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SY100H841
Abstract: SY100H841ZC SY10H841 SY10H841ZC SY10H841ZCTR
Contextual Info: ClockWorks SY10H841 ClockWorks™ SY100H841 SINGLE SUPPLY QUAD PECL-TO-TTL WITH OUTPUT ENABLE SYNERGY SEMICONDUCTOR SYNERGY SEMICONDUCTOR SY10H841 SY100H841 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew
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DM54ALS21AJ
Abstract: DM74ALS DM74ALS21AN J14A M14A N14A
Contextual Info: DM54ALS21A/DM74ALS21A National Semiconductor Corporation DM54ALS21A/DM 74ALS21A Dual 4-Input AND Gates Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart
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SY100H842
Abstract: SY100H842ZC SY10H842 SY10H842ZC SY10H842ZCTR
Contextual Info: SINGLE SUPPLY QUAD PECL-TO-TTL WITH LATCHED OUTPUT ENABLE SYNERGY SEMICONDUCTOR SYNERGY SEMICONDUCTOR ClockWorks SY10H842 ClockWorks™ SY100H842 SY10H842 SY100H842 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew
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PDU-1316-20
Abstract: PDU-1316-1 PDU-1316-12 PDU-1316-2 PDU-1316-5 PDU-1316-100 NS225
Contextual Info: data \flaa Digitally Programmable delay \ë SERIES: PDU-1316 De ay Units deviceli«:. 4-Bit TTL Interfaced Specifications: Test Conditions: • Input signal requirement: TTL logic ■ Output fan-out: TTL schottky load ■ Delay variation: Monotonic in one direction
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Contextual Info: * SINGLE SUPPLY QUAD PECL/TTL-TO-PECL SYNERGY Clockworks SY100S815 SEMICONDUCTOR DESCRIPTION FEATURES Quad PECL version of popular ECLinPS E111 Low skew Guaranteed skew spec TTL enable input Selectable TTL or PECL clock input Single +5V supply Differential internal design
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H600
Abstract: SY100H600 SY10H600 SY10H600JC SY10H600JCTR
Contextual Info: SYNERGY 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SEMICONDUCTOR SYNERGY SEMICONDUCTOR FEATURES SY10H600 SY100H600 SY10H600 SY100H600 DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize
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sy10h600sy100h600sy10/100h60028-lead+4sy10h600jcj28-1sy10h600jctrh600
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