TRANSMITTER-RECEIVER HARRIS Search Results

TR1602A

Abstract: cdp1854 cdp1854ACE TR1602 cdp1854ad
Contextual Info: S CDP1854A, CDP1854AC Semiconductor 7 Programmable Universal Asynchronous Receiver/Transmitter UART March 1997 Features Description • Two Operating Modes The CDP1854A and CDP1854AC are silicon-gate CMOS Universal Asynchronous Receiver/Transmitter (UART) cir­

HD-6402

Abstract: UART 6402 6402 uart A6402
Contextual Info: a6402 Universal Asynchronous Receiver/Transmitter September 1996, ver. 1 Features Data Sheet • ■ ■ ■ ■ ■ ■ General Description a6402 MegaCore function implementing a universal asynchronous receiver/transmitter UART Optimized for FLEX® and MAX® architectures

UART 6402

Abstract: 6402 uart buffer register HD-6402 uart parity A6402
Contextual Info: a6402 Universal Asynchronous Receiver/Transmitter September 1996, ver. 1 Features Data Sheet • ■ ■ ■ ■ ■ ■ General Description a6402 MegaCore function implementing a universal asynchronous receiver/transmitter UART Optimized for FLEX® and MAX® architectures

UART 6402

Contextual Info: a6402 Universal Asynchronous Receiver/Transmitter September 1996, ver. 1 Features Data Sheet • ■ ■ ■ ■ ■ ■ General Description a6402 MegaCore function implementing a universal asynchronous receiver/transmitter UART Optimized for FLEX® and MAX® architectures

TBUS4

Abstract: CDP1854A CDP1854AC CDP1854ACEX CDP1854AE CDP1854AEX CDP6402 TR1602A CDP1854ACDX
Contextual Info: CDP1854A, CDP1854AC S e m ic o n d u c t o r Programmable Universal Asynchronous Receiver/Transmitter UART March 1997 Features Description • Two Operating Modes The CDP1854A and CDP1854AC are silicon-gate CMOS Universal Asynchronous Receiver/Transmitter (UART) cir­

CDP1854AE

Abstract: cdp1854ad
Contextual Info: S*J HARRIS CDP1854A U ^ U S E M I C O N D U C T O R p y Programmable Universal Asynchronous Receiver/Transmitter UART February 1992 Features Description • Two Operating Modes The CDP1854A and CDP1854AC are silicon-gate CMOS Universal Asynchronous Receiver/Transmitter (UART) cir­

ICL2321BE

Abstract: ICL232IJE ICL232 ICL232CPE ICL232IPE ICL2321je ICL232CBE ICL232IBE
Contextual Info: ICL232 Semiconductor +5V Powered, Dual RS-232 Transmitter/Receiver August 1997 Features Description • Meets All RS-232C and V.28 Specifications The ICL232 is a dual RS-232 transmitter/receiver interface circuit that meets all EIA RS-232C and V.28 specifications. It

CDP1854AD3

Contextual Info: ¡S ì H CDP1854A p^ a r r is S E M I C O N D U C T O R Programmable Universal Asynchronous Receiver/Transmitter UART February 1992 Description Features The CDP1854A and CDP1854AC are silicon-gate CMOS Universal Asynchronous Receiver/Transmitter (UART) cir­

ICL232

Contextual Info: WG « 1993 m ÊLmmm i 0 ^ Mm HARRIS S E M I C O N D U C T O R Ê +5V Powered Dual RS-232 Transmitter/Receiver August 1993 Description Features • The ICL232 is a dual RS-232 transmitter/receiver interface circuit that meets all EIA RS-232C specifications. It requires

Contextual Info: HIN232A S E M I C O N D U C T O R High Speed, +5V, RS-232 Transmitter/Receiver with 0.1Microfarad External Capacitor August 1997 Features Description • Meets All EIA RS-232E and V.28/V.24 Specifications The HIN232A High Speed RS-232 transmitter/receiver

ICL232

Abstract: ICL232CPE 3k2c
Contextual Info: ICL232 HARRIS S E M I C O N D U C T O R +5V Powered Dual RS-232 Transmitter/Receiver March 1997 Features Description • Meets All RS-232C and V.28Specifications The ICL232 is a dual RS-232 transmitter/receiver interface circuit that meets all EIA RS-232C and V.28 specifications. It

ICL232

Abstract: ICL232CPE C114 ICL232CBE ICL232CJE ICL232MJE
Contextual Info: ICL232 S E M I C O N D U C T O R +5V Powered Dual RS-232 Transmitter/Receiver December 1993 Features Description • Meets All RS-232C Specifications The ICL232 is a dual RS-232 transmitter/receiver interface circuit that meets all ElA RS-232C specifications. It requires

z source inverter

Abstract: HIN232ACP
Contextual Info: S HÄHRW HIN232A High Speed, +5V, RS-232 Transmitter/Receiver with 0.1 Microfarad External Capacitor August 1997 Features Description • Meets All EIA RS-232E and V.28/V.24 Specifications The HIN232A High Speed RS-232 transmitter/receiver interface circuit meets all EIA RS-232E and V.2B/V.24 specifi­

ICL232

Abstract: ICL232CPE ICL232CBE ICL232CJE ICL232MJE ICL2321
Contextual Info: ICL232 S E M I C O N D U C T O R +5V Powered Dual RS-232 Transmitter/Receiver March 1997 Features Description • Meets All RS-232C and V.28Specifications The ICL232 is a dual RS-232 transmitter/receiver interface circuit that meets all ElA RS-232C and V.28 specifications. It

circuit diagram for simple IR transmitter receiver

Abstract: ICL232CPE tns capacitors ICL232 ICL232IPE
Contextual Info: ICL232 H ARRIS S E M I C O N D U C T O R +5V Powered, Dual RS-232 Transmitter/Receiver August 1997 Features Description • Meets All RS-232C and V.28 Specifications The ICL232 is a dual RS-232 transmitter/receiver interface circuit that meets all EIA RS-232C and V.28 specifications. It

Contextual Info: S h a r r i s C D P 1854 A , C D P 1Ö54 A C S E M I C O N D U C T O R Programmable Universal Asynchronous Receiver/Transmitter (UART) August 1996 Features Description • Two Operating Modes The CDP1854A and CDP1854AC are silicon-gate CMOS Universal Asynchronous Receiver/Transmitter (UART) cir­

5962R9672201QCC

Abstract: 5962R9672201QXC 5962R9672201VCC HS-245RH HS-246RH HS-248RH CERAMIC FLATPACK 5962R9672302VXC
Contextual Info: HS-245RH RADIATION HARDENED TRIPLE LINE TRANSMITTER Semiconductor HS-246RH RADIATION HARDENED TRIPLE LINE RECEIVER HS-248RH February 1996 RADIATION HARDENED TRIPLE PARTY-LINE RECEIVER Features Description • Devices QML Qualified in Accordance with MIL-PRF-38535

HS-245RH

Contextual Info: HS-245RH mßrVtKM i ö X RADIATION HARDENED TRIPLE LINE TRANSMITTER S em iconductor HS-246RH RADIATION HARDENED TRIPLE LINE RECEIVER HS-248RH RADIATION HARDENED TRIPLE PARTY-LINE RECEIVER February 1996 Features Description • Devices QML Qualified in Accordance with

1CL232

Abstract: ICL232CPE ICL232 circuit diagram for simple IR transmitter receiver s431
Contextual Info: ICL232 HARRIS SEMI CONDUCTOR + 5 Volt Powered Dual RS-232 T ransmitter/Receiver GENERAL DESCRIPTION FEATURES The ICL232 is a dual RS-232 transmitter/receiver inter­ face circuit that meets all EIA RS-232C specifications. It requires a single + 5V power supply, and features two on­

HIN232A

Abstract: HIN232ACA HIN232ACB HIN232ACBN HIN232ACP capacitor 0.1microfarad
Contextual Info: HIN232A S E M I C O N D U C T O R High Speed +5V RS-232 Transmitter/Receiver with 0.1Microfarad External Capacitor July 1997 Features Description • Meets All EIA RS-232E and V.28/V.24 Specifications The HIN232A High Speed RS-232 transmitter/receiver interface circuit meets all ElA RS-232E and V.28/V.24 specifications, and is particularly suited for those applications where

Contextual Info: CDP1854A/3, CDP1854AC/3 H a rris " " I C O , " “ OT° " High Reliability CMOS Programmable Universal Asynchronous Receiver/Transmitter UART M a rc h 1997 Description Features • The CDP1854A/3 and CDP1854AC/3 are high reliability silicon gate CMOS Universal Asynchronous Receiver/Trans­

HS-245RH

Abstract: 5962R9672201QCC 5962R9672201QXC 5962R9672201VCC HS-246RH HS-248RH 5962R9672302VXC
Contextual Info: HS-245RH RADIATION HARDENED TRIPLE LINE TRANSMITTER HS-246RH S E M I C O N D U C T O R RADIATION HARDENED TRIPLE LINE RECEIVER HS-248RH February 1996 RADIATION HARDENED TRIPLE PARTY-LINE RECEIVER Features Description • Devices QML Qualified in Accordance with

Contextual Info: HIN232A HARRIS S E M I C O N D U C T O R High Speed, +5V, RS-232 Transmitter/Receiver with 0.1 Microfarad External Capacitor A ug ust 1997 Features Description • Meets All EIA RS-232E and V.28/V.24 Specifications The H IN 232A High Speed R S-232 transm itter/receiver

380n

Abstract: HS-245 HS-246 HS-248 HS-249
Contextual Info: H S -2 4 5 i¥! HARRIS TR IPLE LINE TR AN SM ITTER H S -2 4 6 /2 4 9 TR IPLE LINE RECEIVERS ADVANCE INFORMATION M S-248 o TR IPLE PA R TY-LIN E RECEIVER * '* * S ° o °c V c°^ o O ^ Features High Common Mode Rejection Transmitter and Receiver Party-Line Capability