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A6402 Datasheets (3)

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Part	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
a6402	Altera	Universal Asynchronous Receiver/Transmitter	Original	PDF	149.82KB	14
A6402	Altera	Universal asynchronous receiver/transmitter (UART). Uese approximately 162 FLEX logic elements (LEs)	Original	PDF	203.95KB	8
A6402	Altera	A6402 Universal Asynchronous Receiver-Transmitter Data Sheet	Original	PDF	205.48KB	8

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Southco A6-40-214-10 A6-40-214-10
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Verical	A6-40-214-10		130		1	1 $100.87 10 $61.07 100 $30.05 1000 $30.05 10000 $30.05	Buy Now
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TE Connectivity 55A6402-26-MBD2-9CS2275 - Bag (Alt: D34882-000)
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Avnet Americas	55A6402-26-MBD2-9CS2275	Bag		19 Weeks, 6 Days	2,000	1 - 10 - 100 - 1000 - 10000 $4.57	Buy Now
Master Electronics	55A6402-26-MBD2-9CS2275					1 - 10 - 100 - 1000 $10.10 10000 $6.74	Buy Now
TE Connectivity 55A6402-26-9/96-9CS2275 55A6402-26-9/96-9CS2275 - Bag (Alt: EM5901-000)
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Avnet Americas	55A6402-26-9/96-9CS2275	Bag		16 Weeks, 2 Days	2,000	1 - 10 - 100 - 1000 - 10000 $6.37	Buy Now
Master Electronics	55A6402-26-9/96-9CS2275					1 - 10 - 100 - 1000 $9.64 10000 $6.43	Buy Now
Aratas Corporation XG2A-6402 Headers & Wire Housings Connector w/Reverse Terminal 64 Contacts
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Mouser Electronics	XG2A-6402					1 $7.54 10 $6.44 100 $5.38 1000 $4.28 10000 $4.28	Get Quote
Newark ()	XG2A-6402	Bulk			50	1 - 10 - 100 $5.59 1000 $4.97 10000 $4.97	Buy Now
	XG2A-6402	Bulk			50	1 - 10 - 100 $6.12 1000 $5.88 10000 $5.88	Buy Now
Sager	XG2A-6402				50	1 - 10 - 100 $5.36 1000 $4.11 10000 $4.11	Buy Now
Master Electronics	XG2A-6402					1 - 10 - 100 $5.28 1000 $3.94 10000 $3.79	Buy Now
OMRON Electronic Components XG2A-6402 HEADERS, CONNECTOR W/REVERSE TERMINAL 64 CONTACTS
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RS	XG2A-6402	Bulk			50	1 - 10 - 100 $6.67 1000 $6.67 10000 $6.67	Get Quote

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A6402 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
UART 6402 Abstract: 6402 uart buffer register HD-6402 uart parity A6402 Contextual Info: a6402 Universal Asynchronous Receiver/Transmitter September 1996, ver. 1 Features Data Sheet • ■ ■ ■ ■ ■ ■ General Description a6402 MegaCore function implementing a universal asynchronous receiver/transmitter UART Optimized for FLEX® and MAX® architectures	Original	a6402 hd-6402 uart 6402 6402 uart +2buffer register uart parity	PDF
BA6412 Abstract: JV 3pin 6402F Contextual Info: A6402F/BA6412 A6402F BA6412 2 2-Phase Half-wave Motor Predrivers /Dim ensions U nit: mm A6402F, BA6412 K ^ 'r ^ T 'f o B A6402F and BA6412 are predrivers of 2-phase half wave driving system for fan motor. • ft« 1) P :'-7«Sbb, B C M t a i M i t t # .	OCR Scan	ba6402f/ba6412 ba6402f ba6412 a6402f +26402f jv 3pin	PDF
uart verilog MODEL Abstract: UART using VHDL design of UART by using verilog A6402 Contextual Info: Simulating the a6402 Model June 2000, ver. 1 Introduction with the Visual IP Software User Guide Altera® intellectual property IP MegaCore functions are developed and pre-tested by Altera, and are optimized for specific Altera device architectures. You can test-drive these functions for free via the	Original	a6402 uart verilog model uart using vhdl design of uart by using verilog	PDF
UART 6402 Contextual Info: a6402 Universal Asynchronous Receiver/Transmitter September 1996, ver. 1 Features Data Sheet • ■ ■ ■ ■ ■ ■ General Description a6402 MegaCore function implementing a universal asynchronous receiver/transmitter UART Optimized for FLEX® and MAX® architectures	Original	a6402 hd-6402 uart 6402	PDF
HD-6402 Abstract: UART 6402 6402 uart A6402 Contextual Info: a6402 Universal Asynchronous Receiver/Transmitter September 1996, ver. 1 Features Data Sheet • ■ ■ ■ ■ ■ ■ General Description a6402 MegaCore function implementing a universal asynchronous receiver/transmitter UART Optimized for FLEX® and MAX® architectures	Original	a6402 hd-6402 uart 6402 6402 uart	PDF
project of 8 bit microprocessor using vhdl Abstract: transmitter and receiver project uart verilog testbench UART 6402 UART using VHDL vhdl ODD parity generator HD-6402 project of 16 bit microprocessor using vhdl verilog/USART 6402 buffer register vhdl Contextual Info: a6402 Universal Asynchronous Receiver/Transmitter November 2002, ver. 1.1 Features Data Sheet • ■ ■ ■ ■ ■ General Description Optimized for the Stratix GX, Cyclone™, Stratix, APEX , APEX II, and FLEX® device families Uses approximately 162 logic elements LEs	Original	a6402 hd-6402 project of 8 bit microprocessor using vhdl transmitter and receiver project +7uart verilog testbench uart 6402 uart using vhdl vhdl odd parity generator project of 16 bit microprocessor using vhdl verilog/usart 6402 buffer register vhdl	PDF
PLSM-6402 Abstract: epm9320 10K50 flex 10k20 10K30A Contextual Info: Ordering Information M a y 19 99, v e r. 10 Altera Devices Figure 1 explains the ordering codes for Altera devices. Devices that have m ultiple pin counts for the same package include the pin count in their ordering codes. Some codes use relative numbers e.g., -1, -2 to	OCR Scan	208-pin 240-pin 304-pin pl-skt/q100 +10pl-skt/q160 pl-skt/q208 pl-skt/q240 pl-skt/q304 100-pin plsm-6402 epm9320 10k50 flex 10k20 10k30a	PDF
EPF6016TC144-3 Abstract: relay Re 04501 re 04501 relay USART 8251 lms algorithm using vhdl code C8251 NEC RELAY 10PIN 5V 8251 uart vhdl PDN9516 verilog code for Modified Booth algorithm Contextual Info: Newsletter for Altera Customers ◆ Second Quarter ◆ May 1998 Altera Unveils FLEX 10KE Devices Altera recently unveiled enhanced versions of FLEX ␣ 10K embedded programmable logic devices— FLEX 10KE devices. Fabricated on a 0.25-µm, five-layer-metal process with a 2.5-V core, FLEX 10KE	Original	epf10k100b epf6016tc144-3 relay re 04501 re 04501 relay +7usart 8251 lms algorithm using vhdl code c8251 nec relay 10pin 5v 8251 uart vhdl pdn9516 verilog code for modified booth algorithm	PDF
HDTV transmitter receivers block diagram Abstract: 20 channel GRAPHIC EQUALIZER eureka pci 64 10 channel GRAPHIC EQUALIZER block diagram graphic equalizer image processing DSP asic sican dsp adsl typical "bit error rate" MPEG-4 decoder receiver ADSL Modem circuit diagram Contextual Info: ¨ Megafunctions Selector Guide System-on-a-Programmable-Chip Solutions June 1999 Contents 2 Introduction to Altera Megafunctions 4 Digital Signal Processing Megafunctions 7 Communications Megafunctions 8 PCI & Other Bus Interface Megafunctions 10 Processor & Peripheral Megafunctions	Original	m-sg-megafctn-02 hdtv transmitter receivers block diagram 20 channel graphic equalizer eureka pci 64 +710 channel graphic equalizer block diagram graphic equalizer image processing dsp asic sican dsp adsl typical "bit error rate mpeg-4 decoder receiver adsl modem circuit diagram	PDF
16 QAM modulation matlab code Abstract: lx5280 CZ80PIO PLD-10 uart 8250 CRC matlab lEXRA lx5280 qpsk simulink matlab OFDM DSP Builder Alcatel dsp Contextual Info: インテレクチャル・プロパティ・セレクタ・ガイド System-on-a-Programmable-ChipソリューションのためのIPファンクションアルテラのIPファンクションについて数百万ゲートのプログラマブル・ロジック・デバイス（PLD）の登	Original	ampp15 16 qam modulation matlab code lx5280 cz80pio +7pld-10 uart 8250 crc matlab lexra lx5280 qpsk simulink matlab ofdm dsp builder alcatel dsp	PDF
microprocessors architecture of 8251 Abstract: 8251 uart in vhdl code VHDL CODE FOR 8255 vhdl source code for fft how to test fft megacore Reed-Solomon Decoder verilog code 8251 DMA controller design of dma controller using vhdl 8259 interrupt controller vhdl code Contextual Info: Introduction to Megafunctions January 1998, ver. 1 Overview With programmable logic device PLD densities reaching 250,000 gates, it is now possible to implement entire digital subsystems on a single PLD. However, designing at higher density levels poses a new set of challenges.	Original	microprocessors architecture of 8251 8251 uart in vhdl code vhdl code for 8255 vhdl source code for fft +5how to test fft megacore reed-solomon decoder verilog code 8251 dma controller design of dma controller using vhdl 8259 interrupt controller vhdl code	PDF
digital FIR Filter verilog HDL code Abstract: digital FIR Filter with verilog HDL code Contextual Info: Introduction to the Microperipheral MegaCore Library Data Book February 1997 Overview With programmable logic device PLD densities reaching 100,000 gates, it is now possible to implement entire digital sub-systems within a single programmable device. However, designing at higher density levels also	Original	digital fir filter verilog hdl code digital fir filter with verilog hdl code	PDF
SE564F Abstract: max 9694 e ne564n em 6695 564n 9319l LI 803-4 X5320 555 signetics application notes ic 741 comparator signal generator Contextual Info: NE564N NE564F A R i t A A i i pi t f SPRAGUE_ _ _ _ _ _ _ _ _ _ _ !ffííl THE M A R K OF R E L IA B IL IT Y . . . . In teg rated C ircuits N E 564N , NE564F, A N D SE564F HIGH-FREQUENCY PHASE-LOCKED LOOPS FEATURES • • • • • • D Operation to 50 MHz	OCR Scan	ne564n ne564f se564f max 9694 e +7em 6695 564n 9319l li 803-4 x5320 555 signetics application notes ic 741 comparator signal generator	PDF
HP 3070 Tester Abstract: HP 3070 Manual FPGA Virtex 6 pin configuration ORCA fpga BGA reflow guide transistor comparison data sheet Interleaver-De-interleaver BGA and QFP Package binary to gray code converter megafunction CAN 2.0 Contextual Info: Contents by Document Type March 2000 Application Briefs AB 124 Prescaled Counters in FLEX 8000 Devices AB 130 Parity Generators in FLEX 8000 Devices AB 131 State Machine Encoding AB 135 Ripple-Carry Gray Code Counters in FLEX 8000 Devices Application Notes	Original	7000ae xc9500xl atf1500as hp 3070 tester +9hp 3070 manual fpga virtex 6 pin configuration orca fpga bga reflow guide transistor comparison data sheet interleaver-de-interleaver bga and qfp package binary to gray code converter megafunction can 2.0	PDF

MC3361P Abstract: ULN-3862A ULN3862A 6402C sprague ULN sprague Contextual Info: D m ûTàX * öS w w flSlUñSQ DQD1B3Q 5 SPRAGUE 82D 01330 INTERIM ISSUE D T -77 0S~ 0 7 Specifications Subject to Change Without Notice Ma)'3l9M ULN-3862A Integrated Circuits THE MARK OF RELIABILITY SPRAGUE/SEfllCOND GROUP ULN-3862A LOW-POWER F-M l-F SYSTEM	OCR Scan	uln-3862a 16-pin c3361p 6597h +6-6402c mc3361p uln3862a 6402c sprague uln sprague	PDF
UCN relay driver Abstract: ucn5890a 165L UCN5891 UCN5891A 5890A 5891A UCN-5890A UCN-5891A UCN-5891B Contextual Info: i'ii W M UCN-5890A/B UCN-5891A/B SPRflGUE T H E M ARK O F R E L IA B IL IT Y Integrated Circuits i S d J UCN-5890A/B AND UCN-5891 A/B BiMOS II 8-BIT, SERIAL-INPUT, LATCHED SOURCE DRIVERS I Ik , ÉM FEATURES • • • • • S E R IA L DATA OUT GROUND 50 V or 80 V Source Outputs	OCR Scan	ucn-5890a/b ucn-5891a/b ucn-5891 ucn relay driver +9ucn5890a 165l ucn5891 ucn5891a 5890a 5891a ucn-5890a ucn-5891a ucn-5891b	PDF
synchronizer megafunction Abstract: 5 bit multiplier using adders function generator catalog CAN BUS megafunction generator function iir filter applications a8255 ieee floating point implementing FIR and IIR digital filters sb transistors Contextual Info: Megafunction Contents March 2000 Application Notes AN 73 Implementing FIR Filters in FLEX Devices AN 84 Implementing fft with On-Chip RAM in FLEX 10K Devices AN 86 Implementing the pci_a Master/Target in FLEX 10K Devices AN 98 Comparing Performance of Common Megafunctions	Original	a16450 a6402 a6850 synchronizer megafunction +95 bit multiplier using adders function generator catalog can bus megafunction generator function iir filter applications a8255 ieee floating point implementing fir and iir digital filters sb transistors	PDF
sican Abstract: QQ P 358 C16550 EPF10K50E INL03994 microchannel V8-uRISC Contextual Info: メガファンクション・セレクタ・ガイド System-on-a-Programmable-Chipソリューション June 1999 目次 2 アルテラのメガファンクションについて 4 ディジタル信号処理用メガファンクション 7 コミュニケーション用メガファンクション	Original	20kflexflex 10kflex 10keflex 8000flex +116000maxmax 9000max 7000max m-sg-megafctn-02/j sican qq p 358 c16550 epf10k50e inl03994 microchannel v8-urisc	PDF
qpsk simulink matlab Abstract: Ncomm 16 QAM modulation matlab code NetLogic altera CORDIC ip CRC matlab OFDM Matlab code lx5280 lEXRA lx5280 Altera digilab 10k10 Contextual Info: インテレクチャル・プロパティ・セレクタ・ガイド System-on-a-Programmable-ChipソリューションのためのIPファンクションアルテラのIPファンクションについて数百万ゲートのプログラマブル・ロジック・デバイス（PLD）の登	Original	ampp15 qpsk simulink matlab ncomm 16 qam modulation matlab code +7netlogic altera cordic ip crc matlab ofdm matlab code lx5280 lexra lx5280 altera digilab 10k10	PDF
VMIC reflective Abstract: EPM7128Q altera flex10k EPM7160 Transition amd 9513 xilinx FPGA IIR Filter PL-BITBLASTER EPF10K20A VMIPCI-5588 EPM9560GC280 Contextual Info: FLEX 10K Price Reductions See page 4 Newsletter for Altera Customers ◆ Fourth Quarter ◆ November 1996 Altera Announces the 3.3-V FLEX 10KA Family Altera announces the FLEX®10KA family of 3.3-V programmable logic devices PLDs , with projected densities up to an	Original	104mhz flex10ka 16-tap vmic reflective +9epm7128q altera flex10k epm7160 transition amd 9513 xilinx fpga iir filter pl-bitblaster epf10k20a vmipci-5588 epm9560gc280	PDF
6402 uart Abstract: digital serial data filtering using fir filters megafunction Contextual Info: Introduction to Target Applications February 1997, ver. 1 With programmable logic device PLD densities reaching 250,000 gates, it is now possible to implement entire digital subsystems within a single PLD. This new level in density creates greater opportunities for designers	Original	a6850 6402 uart digital serial data filtering using fir filters megafunction	PDF
ALTERA MAX 5000 programming Abstract: Altera Classic EPLDs Altera Programming Hardware advantages of multipliers Reed-Solomon CODEC an7112 Reed-Solomon altera ALTERA MAX 5000 applications altera flex 8000 Contextual Info: Contents July 1997 Contents by Topic FLEX 10K Devices FLEX 10K Embedded Programmable Logic Family Data Sheet FLEX 10K Embedded Programmable Logic Family Data Sheet Supplement ClockLock & ClockBoost in FLEX 10K Devices Data Sheet Supplement EPF10K50V Embedded Programmable Logic Device Data Sheet Supplement	Original	epf10k50v epf10k130v 000-gate epf10k100 +107000s altera max 5000 programming altera classic eplds altera programming hardware advantages of multipliers reed-solomon codec an7112 reed-solomon altera altera max 5000 applications altera flex 8000	PDF
a6403 Contextual Info: INTEGRATED CIRCUITS e m s y iiT BUS A6402; A6402A; TDA6403; TDA6403A 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners Product specification Supersedes data of 1997 Oct 29 File under Integrated Circuits, IC02 Philips Sem iconductors	OCR Scan	tda6402 tda6402a tda6403 tda6403a +5tsa5526 19-bit 27-bit 545104/1200/04/pp40 a6403	PDF
PLSKT/Q100 Abstract: flex 10k20 UART 8251 serial port 8251 8255 program peripheral interface altera 5032 8259 Programmable Peripheral Interface Peripheral interface 8255 notes download power line carrier communication code to interface 8255 as temperature controller Contextual Info: Ordering Information August 1999, ver. 10 Altera Devices Altera Corporation A-GN-ORD-10 Figure 1 explains the ordering codes for Altera® devices. Devices that have multiple pin counts for the same package include the pin count in their ordering codes. Some codes use relative numbers e.g., -1, -2 to	Original	-gn-ord-10 pl-skt/q304 100-pin 208-pin +12240-pin 304-pin plskt/q100 flex 10k20 uart 8251 serial port 8251 8255 program peripheral interface altera 5032 8259 programmable peripheral interface peripheral interface 8255 notes download power line carrier communication code to interface 8255 as temperature controller	PDF

A6402 Search Results

A6402 Datasheets (3)

A6402 Price and Stock

Southco A6-40-214-10

TE Connectivity 55A6402-26-MBD2-9CS2275

TE Connectivity 55A6402-26-9/96-9CS2275

Aratas Corporation XG2A-6402

OMRON Electronic Components XG2A-6402

A6402 Datasheets Context Search

UART 6402

BA6412

uart verilog MODEL

UART 6402

HD-6402

project of 8 bit microprocessor using vhdl

PLSM-6402

EPF6016TC144-3

HDTV transmitter receivers block diagram

16 QAM modulation matlab code

microprocessors architecture of 8251

digital FIR Filter verilog HDL code

SE564F

HP 3070 Tester

MC3361P

UCN relay driver

synchronizer megafunction

sican

qpsk simulink matlab

VMIC reflective

6402 uart

ALTERA MAX 5000 programming

a6403

PLSKT/Q100