TP2540ND Search Results

Contextual Info: TP2535 TP2540 £jUlt — P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information bv dss/ Order Number / Package ^DS ON ^GS(th) ^D(ON) b v dgs (max) (max) (min) TO-92 TO-243AA* DICE+ -350V 25Q -2.4V -0.4A TP2535N3 — TP2535ND -400V 25Q -2.4V -0.4A

VP1304N2

Abstract: TP2540ND VN1304N3 VP3203N3 LND150N8 VN3205N5 VN1310N3 TN2510N8 TN0102N2 VP1306N2
Contextual Info: _ _ fflpSupertex inc. Device Page # Device Page # Device A lp h a n u m e ric Index Page # Device Page# 2N7002 BSS123 DN2535N2 DN2535N3 DN2535N5 20 24 28 28 28 TN2106K1 TN2106N3 TN2124K1 TN2501N8 TN2501ND 57 57 61 63 63 TP2504ND TP2506ND TP2510N8 TP2510ND

Contextual Info: 0 Supertex inc. TP25D Low Threshold Preliminary P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information * t Order Number / Package b v dss / ^D S ON ^G S(th) I d (ON) BV dgs (max) (max) (min) TO-92 TO-243AA* DICEt -350V 25Q -2.4V -0.4A TP2535N3

Contextual Info: TP2540 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This

Contextual Info: TP2540 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This

tp5d

Abstract: marking code tp5d TP2535 TP2535N3 TP2540 TP2540N3 TP2540N8 TP2540ND
Contextual Info: TP2535 TP2540 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / BVDGS RDS ON (max) VGS(th) (max) ID(ON) (min) TO-92 -350V 25Ω -2.4V -0.4A TP2535N3 — — -400V 25Ω -2.4V -0.4A TP2540N3 TP2540N8

TP2535

Abstract: TP2535N3 TP2535ND TP2540 TP2540N3 TP2540N8 TP2540ND
Contextual Info: TP2535 TP2540 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / BVDGS RDS ON (max) VGS(th) (max) ID(ON) (min) TO-92 -350V 25Ω -2.4V -0.4A TP2535N3 — TP2535ND -400V 25Ω -2.4V -0.4A TP2540N3

Contextual Info: TP2540 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description Low threshold -2.4V max. High input impedance Low input capacitance (125pF max.) Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage

diode 400V 4A

Abstract: TP2540 TP2540N8 TP2535 TP2535N3 TP2535ND TP2540N3 TP2540ND ,tp2535
Contextual Info: TP2535/TP2540 TP2535 TP2540 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / BVDGS RDS ON (max) VGS(th) (max) ID(ON) (min) TO-92 TO-243AA* DICE† -350V 25Ω -2.4V -0.4A TP2535N3 — TP2535ND

tp5d

Abstract: tp2540n8-g SITP TP2540 TP2540ND
Contextual Info: TP2540 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This

Contextual Info: Supertex inc. ^ T P 25 D Lo w T h r e s h o ld P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information b v dss ! Order Number / Package R DS ON V GS«h) b (O N ) (max) (max) (min) TO-92 TO-243AA* DICE+ -350V 25Î2 -2.4V -0.4A TP2535N3 — TP2535ND

Contextual Info: TP2535 TP2540 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / BVDGS RDS ON (max) VGS(th) (max) ID(ON) (min) TO-92 TO-243AA* Die† -350V 25Ω -2.4V -0.4A TP2535N3 — — -400V 25Ω -2.4V -0.4A

tp5d

Contextual Info: TP2540 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This

tp5d

Abstract: TP2535 TP2535N3 TP2540 TP2540N3 TP2540N8 TP2540ND 04a marking
Contextual Info: TP2535 TP2540 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / BVDGS RDS ON (max) VGS(th) (max) ID(ON) (min) TO-92 TO-243AA* Die† -350V 25Ω -2.4V -0.4A TP2535N3 — — -400V 25Ω -2.4V -0.4A

Contextual Info: — TP2535 TP2540 * S u p e r t e x m c . _ Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / ^DS O N V(3S(th) ^D(ON) BVDgs (max) (max) (min) TO-92 TO-243AA* Diet -350V 250

Contextual Info: TP2535 TP2540 S u p e rte x In c ._ Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Num ber / Package BVDSS / ^ D S O N ^ G S (th ) ^D(ON) b v dgs (max) (max) (min) TO-92 TO-243AA* Diet -350V 25ß

SW7 357

Abstract: HV803 ausi die attach CSI 2702 HV208 HV82 38495 VF01 VP03 AF03
Contextual Info: Chapter 19 – Die Specifications DMOS Die Specifications Selector Guide VF01/VF06/VF21/VF25 VF22/LND1/LP07 VF05/VF13/VF26/TN07 VF32/LNE1/LP08 AF03 LR6 LR7 HT04 HV15/HV16/HV18 HV202 HV204/HV217/HV218/HV227/HV228 HV207 HV208 HV209 HV21/HV22 HV31/49 HV34 HV45/HV46