TOPOGRAPHY Search Results

Contextual Info: HI-8020 Series CMOS High Voltage Display Driver General Description Chip Topography HI-8020 Typical The HI-8020 high voltage display driver is a functional replacement for the AMI S4520 series drivers. The chip is con­ structed of MOS P Channel and N Chan­

Contextual Info: DIE PRODUCTS BURR-BROW N* [ DAC703 DIE 1 Current Output 16-BIT DIGITAL-TO-ANALOG CONVERTER DIE FEATURES • HIGH ACCURACY • MONOTONIC AT 14 BITS OVER FULL MILITARY TEMPERATURE RANGE DIE TOPOGRAPHY 23 22 21 20 191817 _ _ 16 15 14 13 12 11 3 PAD 1 2 3 4 5

2N3922

Abstract: JFET Matched 2N3921 matched pair JFET MONOLITHIC DUAL N-CHANNEL JFET
Contextual Info: 2N 3921, 2N 3922 Dual M onolithic N -C h an n el J F E T D G tfñfiP S D IL M ATCHED FET PAIRS FOR D IFFERENTIAL AMPLIFIERS PIN CONFIGURATION CHIP TOPOGRAPHY TO-71 6017 • Ig < 250 pA 25 nA at 100°C • goss < 20 ¿umbos ( I d = 700 mA) • Matched V q s , AV g s , and gts

j303

Abstract: J308 J310
Contextual Info: J 3 0 8 -J 3 1 0 N -C h an n el S ilicon JFET APPLICATIONS PIN CONFIGURATION • VHF/UHF Amplifiers • Oscillators • Mixers CHIP TOPOGRAPHY TO-92 FEATURES • Industry Standard Part In Low Cost Plastic Package • High Power Gain 11 dB Typical at 450 MHz

electrometer

Abstract: electrometers MFE823
Contextual Info: MMmOL APPLICATIONS • • • • High-Input Impedance Amplifiers Smoke Detectors Electrometers pH Meters M FE 823 Enhancem ent Mode P-Channel MOSFET PIN CONFIGURATION CHIP TOPOGRAPHY 1503 FEATURES • High Input Impedance Iq ss - 30 Femto Amp Typical • High Gain

U421

Abstract: electrometer U422 U423 U424 U421 jfet JFET APPLICATIONS U425
Contextual Info: om noiL U421-U426 Monolitlc Dual N-Channel JF E T A PP LIC A TIO N S • Very High Input Impedance Differential Amplifiers • Electrometers • Impedance Converters PIN CONFIGURATION CHIP TOPOGRAPHY 6034 FEATURES • High Input Impedance Ig = 0.1 pA Maximum U421-3

Contextual Info: HI-901 High Voltage MOS Gate Driver General Description Chip Topography The HI-901 is a bootstrap high side driver circuit for controlling N-channel power FETs. The output pin of die driver is alow impedance CMOS buffer which drives the gate of the FET. The output voltage of the

topography

Abstract: Maxim Integrated Products MX7533
Contextual Info: _Chip Topography Information PDIPN.EPS MX7533 CMOS Low Cost 10 Bit Multiplying D/A Converter 6

u1899

Abstract: U1897 U1898 U1897-U1 U1898J
Contextual Info: DMÜ^DIL U 1 8 9 7 -U 1 8 9 9 N -C hannel JFIET FEATURES PIN CONFIGURATION • Low insertion Loss fDS on <30ß (Ü1897) • No Error or Offset Voltage Generatod by Closed Switch CHIP TOPOGRAPHY TO-92 x f "" 5001B "I'v, O i l F U i L RADIUS APPLICATIONS Analog, Switches, Choppers, Communicators

2N5019

Abstract: ISS302 2n5016 2N5018
Contextual Info: Dftüüü^>Dl 2 N 5 0 1 8 .2 N 5 0 1 9 P-C hannel J F E T APPLICATIONS PIN CO NFIGURATIO N • Analog Switches • Commutators I • Choppers CHIP TOPOGRAPHY 5508B TO-18 FEATURES I• Low Insertion Loss r<js on < 750 (ÜN5018) • No Offset or Error Voltages Generated

2N5565

Abstract: 2N5564 2N5566 2N5564 equivalent Dual N-Channel JFET 2N5364 dss2 2N5S66
Contextual Info: 2 N 5 5 6 4 -2 N 5 5 6 6 D ual N -C h an n el JF E T FEATURES • Specified Matching Characteristics • High Qaln — 7500/imho Minimum • Low “ON” Resistance — 1000 Maximum PIN CONFIGURATION CHIP TOPOGRAPHY TO-71 6033 ABSOLUTE MAXIMUM RATINGS 25° C unless otherwise noted

2N2609

Abstract: 2N2608 2N2607 "P-Channel JFET" 2N2807 JFET 50ma -40v P-Channel JFET jfet 2N
Contextual Info: 2 N 2 6 0 7 -2 N 2 6 0 9 2 N 2 6 0 9 JAN P -C h a n n e l JF E T O ßfrSH O IL APPLICATIONS • Low-level Choppers • Data Switches CHIP TOPOGRAPHY PIN CONFIGURATION 5010 for 2N2607, 8 TO-18 4-, • Comm utators A B SO LU T E M A X IM U M R A T IN G S @ 25°C (unless otherwise noted)

3N163

Abstract: 3N164 3N170
Contextual Info: D M üm 3N163, 3N164 P-Channel Enhancem ent Mode MOS FIET FEATURES • V ery High Input Impedance • High Gate Breakdown • Fast Switching • Low Capacitance PIN CONFIGURATION CHIP TOPOGRAPHY 1503- 2! MAXIMUM RATINGS @ 2 5 °C ambient unless noted} 3 N 163

2n3972

Abstract: 2N3970 2N3971 2N3970-2N3972
Contextual Info: MMÜÜ^fDIL 2 N 3 9 7 0 -2 N 3 9 7 2 N -C h an n el JFET FEATURES • rDS on < 30 ohms (2N3970) PIN CONFIGURATION CHIP TOPOGRAPHY TO-18 5001B • iD(off) < 250 pA • Fast Switching 001 » fULU RADIUS _ . 00M_ , OOITS.IOAA'NI ~ \ ~ " H 0012 [NOTt SUUSTflAff iSGATt

DAC703

Abstract: DAC703AD 16-Bit Digital-to-Analog Converter - Voltage or Current Model
Contextual Info: DDE PRODUCTS B U R R -B R O W N * DAC703 DIE 1 [ Current Output 16-BIT DIGITAL-TO-ANALOG CONVERTER DIE FEATURES • HIGH ACCURACY • MONOTONIC AT 14 BITS OVER FULL MILITARY TEMPERATURE RANGE DIE TOPOGRAPHY 26 25 24 23 22 21 20 19 18 17 n.pa 16 15 14 13 12

J201 equivalent

Abstract: J201-J204 J202 equivalent J201 j204 J203 sg-5010 j201 jfet x0035
Contextual Info: D IM m ü ^lölL J201-J204 N-Chanriel J F E T FEATURES PIN CONFIGURATION • High Input Impedance IQ = 35pA Typ. • Low IQSS (IGSS = 100pA max) CHIP TOPOGRAPHY TO-92 5010 „ .00254.0035) „ .002S(.0635) , .OOM(.MM) .0G35(.0M9) ABSOLUTE MAXIMUM RATINGS (25 °C)

U231-U235

Abstract: U232 Dual N-Channel JFET U23X U231 tlc 1125 JFET APPLICATIONS U233 MONOLITHIC DUAL N-CHANNEL JFET 200xA
Contextual Info: DlNfiflÜ^DIL U231-U235 Monolithic Dual N-Channel JFE T A P P LIC A T IO N S • Differential Amplifiers • Low and Maximum Frequency Amplifier! PIN CONFIGURATION CHIP TOPOGRAPHY TO-71 6017 — FEATURES • Good Matching Characteristics A B S O L U T E M AXIM UM R A TIN G S (25° C)

2N4393

Abstract: 2N4391 4391 jfet 4392 2N4392 n channel 2n4393 T018 ITE4391
Contextual Info: IT E 4 3 9 1 -IT E 4 3 9 3 2 N 4 3 9 1 -2 N 4 3 9 3 N -C h an n el JF E T IM f U D IL FEATURES CHIP TOPOGRAPHY PIN CONFIGURATIONS • rds on < 30 ohms (2N4391) • lD(oH) < 100 pA • Switches ±10 VAC with ± 15V Supplies (2N4392, 2N4393) TO -18 5001B TO-92

U202

Abstract: u201 U200 DU202 U202D
Contextual Info: DmUDIL U 2 0 0 -U 2 0 2 N-Channel JFET Applications PIN CONFIGURATION • Analog Switches • Commutators • Choppers CHIP TOPOGRAPHY TO-18 FEATURES • Low Insertion Loss • r ds on <500 (U202) • Good Off lsolation iD(off) < 1 nA ORDERING INFORMATION

2N4093

Abstract: 2N4092 2N4091 to92 2n4091
Contextual Info: OßffiÜ^OlL ITE4091-ITE4093 2N 4091-2N 4093, JA N TX * N-Channel J F E T FEATURES • 'DS ON < 3 0 ohm s(2N4091) • !D ( O F F ) PIN CONFIGURATIONS < 100 PA (JA N TX Types) TO-92 T O -« • F a st S w itching CHIP TOPOGRAPHY NOTE SUBSTRATE I! ABSOLUTE MAXIMUM RATINGS

2N5434

Abstract: 2N5433 2N5432 2N5432-2 S01A
Contextual Info: 2 N 5 4 3 2 -2 N 5 4 3 4 N -C h a n n e l J F E T Q M V Ü P ID IL FEATURES • rds on < 5 ohms • Excellent Swltchlng — ton < 4 ns totf < 6 ns PIN CO NFIGURATIO N CHIP TOPOGRAPHY TO 52 5018 D .0035 0026 • Low Cutoff Current — lo(off) < 200 pA 0036

PIN DIODE DRIVER CIRCUITS

Contextual Info: HI-901 High Voltage MOS Gate Driver General Description Chip Topography The HI-901 is a bootstrap high side driver circuit for controlling N-channel power FETs. The output pin of the driver is a low impedance CMOS buffer which drives the gate of the FET. The output voltage of the

zener wafer

Abstract: TL602
Contextual Info: D IE P R O D U C TS BURR-BROldN H E D |l7 31 3bÇ DDlS4flb S CORP BURR-BROW N« I T~5 -0^- I U DAC703 DIE Current Output 16-BIT DIGITAL-TO-ANALOG CONVERTER DIE FEATURES i HIGH ACCURACY i MONOTONIC AT 14 BITS OVER FULL MILITARY TEMPERATURE RANGE DIE TOPOGRAPHY

zener diode phc 47

Abstract: zener diode phc zener diode phc 51 zener phc 12 zener diode phc 16 zener PH-C zener diode phc 10 zener diode phc 27 zener phc HI-930
Contextual Info: *EP 7 1992 HI-930 Electronic Ballast Control, Boost Mode Chip Topography General Description The HI-930 is a CMOS integrated circuit designed for electronic ballast applications. The chip combines a unique power factor control circuit with a ballast control circuit achieving a high level of