TNCA Search Results

Contextual Info: MODEL TNCAP DESCRIPTION TNC Angle Plug 58/U MODEL TNCAP/J DESCRIPTION TNC Angle Adapter P/J SPECIFICATIONS SERIES CABLE GROUP FINISH INSULATION IMPEDANCE TNC 58 Nickel Delrin 50 Ω SPECIFICATIONS SERIES CABLE GROUP FINISH INSULATION IMPEDANCE TNC n/a Nickel

FT08

Contextual Info: JK ft DON DATE REV. MDR.I! 'k M ñ & DESCRIPTION NO. Ä É CHK. " . 3fc HH" APPD. APPD. 7 / 1 6 —2 8 U N E F - 2 B < ±0 , 8 9 > 16.4 2 0 DESIGNATION TNCA00BD37 CONNECTION N o .B 7: DO UB LE BR A I D C O A X I A L CA B L E OF 1.BD £ # # * 3 7 : 1 .5 D * |É Z £ ífi* M * - - ? ;i/

TNCA

Contextual Info: SPECIFICATION CONTROL DRAWING ,437 FLATS AND HEX 1. MATING INTERFACE DIMENSIONS PER TYPE TNCA PLU G PER M IL -S T D -3 4 8 Fig. 3 1 3 -3 . 2 . ELECTRICAL DC TO 18.0 GHz. 1.10 + .008 x FGHz. .045 dB x VFGHz. 50 335 100 dB - FGHz. - 6 5 ° c TO + 2 0 0 ° c

D37 connector

Contextual Info: DON DATE REV. R rt & DESORIPTION NO. Hi 111 DR. " 'fi É OH K. è UH # IS APPD. APPD. DESIGNATION TNCA001 D37 CONNECTION £ ¡ Ü # f 37:1 No . 3 7 :S I N G L E B R A I D C O A X I A L CA B L E OF 1.5D CHARACTERISTIC IMPEDANCE : D=50û DEVELOPMENT C O N N E C T O R T Y PE

9080-6CCSF

Abstract: 9080-1CCSF
Contextual Info: TNC Connectors Semi-Rigid Cable Connectors The specifications below are general specifications for TNCA connectors. Specific data is available from the factory upon request. The General, Electrical, Mechanical and Environmental Specifications in the following table are recommended for any procurement documents or drawings.

capacitor cross reference

Abstract: 336 Tantalum Capacitor 10TPB33M PSLB1A336M NEC-TOKIN America tantalum capacitor 336 T520B336M010AE070 capacitor 336 nec-tokin 337 tantalum capacitor
Contextual Info: Polymer Tantalum Capacitor Cross Reference Guide Holy Stone: TNCA1A336MTRXF TNC A 1A 336 M T R X F Style Case Code LxW mm Rated Voltage Capacitance (µF) Tolerance Packaging Polarity Code Special Product Code Termination TNC: Polymer Standard TNF: Polymer Face Down

Contextual Info: SPECIFICATION CONTROL DRAWING ,437 FLATS AND HEX 1. MATING INTERFACE DIMENSIONS PER TYPE TNCA PLUG PER M IL -S T D -3 4 8 Fig. 3 1 3 -3 . 2. ELECTRICAL DC TO 12.5 GHz. 1.10 + .008 x FGHz. .045 dB x VFGHz. 50 335 100 dB - FGHz. - 6 5 ° c TO + 2 0 0 ° c

Contextual Info: SPECIFICATION CONTROL DRAWING ,437 FLATS AND HEX 1. MATING INTERFACE DIMENSIONS PER TYPE TNCA PLUG PER M IL -S T D -3 4 8 Fig. 3 1 3 -3 . 2. ELECTRICAL DC TO 12.5 GHz. 1.10 + .008 x FGHz. .045 dB x VFGHz. 50 335 100 dB - FGHz. - 6 5 ° c TO + 2 0 0 ° c

Contextual Info: SPECIFICATION CONTROL DRAWING 1. MATING INTERFACE DIMENSIONS PER M IL -S T D -3 4 8 Fig. 313.3 TNCA PLUG AND 310.1 (SM A PLUG) 2. ELECTRICAL DC TO 18.0 GHz. 1.06 + .013 FGHz. .050 dB x 7 FGHz. 50 415 -1 0 0 dB - FGHz. - 6 5 ° c TO + 1 6 5 ° c 1,250 10,000

Contextual Info: PRELIMINARY 4,194,304 WORD x 1 BIT DYNAMIC RAM DESCRIPTION The TC514101AP/AJ/ASJ/AZ is the new generation dynamic RAM organized 4,194,304 words by 1 bit. The TC514101AP/AJ/ASJ/AZ utilizes TOSHIBA’S CMOS Silicon gate process technology as well as advanced circuit techniques to provide wide operating m argins, both internally and to the system user.

Contextual Info: TE X A S IN ST R -CASIC/MEMORY} ^77 i>Ë| 6 ^ 1 7 2 5 D040774 77C 4 0 7 7 4 -§361725 TEXAS 1NSTR ASIC/MEMORY D TM4256EL9, TM4256GU9. TM4257EL9, TM4257GU9 262,144 BY 9-BIT DYNAMIC RAM MODULES SEPTEMBER 1986 - REVISED NOVEMBER 1985 T M 4 2 B .E L9 . . . L SINGLE-IN-UNE PACKAGE

A100COLUMN

Contextual Info: 4 ,1 9 4 ,3 0 4 W ORD x 1 BIT D Y N A M IC R A M * This is advanced information and specifica­ tions are subject to change without notice. DESCRIPTION The TC514101AP/AJ/ASJ/AZ is the new generation dynamic RAM organized 4,194,304 words by 1 bit. The TC514101AP/AJ/ASJ/AZ utilizes TOSHIBA’S CMOS Silicon gate process technology as well as

c2kc

Abstract: UKY 220 41 TM425 DM07S
Contextual Info: TEXAS 3961725 INSTR TEXAS - C A S I C / M E M O R Y> IN S T R 11 DEI 0 ^ 1 7 2 5 <ASIC/M EM O RY> 262,144 0040751 77C 40751 TM4256EC4, TM4257EC4 BY 4-BIT DYNAMIC RAM MODULES SEPTEM BER 9 1 8 5 - R EV ISED NOVEM BER 1985 C SINGLE-IN-LINE PACKAGE TOP VIEW

NZ70

Abstract: TC511001 TC511001AZ adata a55 diagram 4ao5
Contextual Info: TOSHIBA -CLOGIC/MEMORY} 14E D • i-DTVEMß DOlfiTOS S ■ T -46-23-15 TOSHIBA MOS MEMORY PRODUCTS TC511001AP/AJ/AZ-70, TG511001 AP/AJ/flZ-80 TC511001AP/AJ/AZ-10 DESCRIPTION The TC511001AP/AJ/AZ is the new generation dynamic RAM organized 1,048,576 words by

a00u

Abstract: Z32100 STK 411 230 WE32100 ALI m7 101b BUX 707 z32101 Z32103 BUDA lo4p
Contextual Info: Y " P ro d u ct S pecification January 1987 Z32103 D R A M C O N TR O LLER DESCRIPTION T he Z32103 D R A M Controller provides address multiplexing, access and cycle time management, and refresh control for dynam ic random access m emory DRAM . It provides, in a single chip,

Contextual Info: Am90C255 256K x 1 CMOS Nibble Mode Dynamic RAM PRELIMINARY SSZ006WV DISTINCTIVE CHARACTERISTICS • • • High density 256K x 1 Low-power dissipation — 358 mW active High-speed operation — 80-ns access, 130-ns cycle times • High-speed Nibble Mode - 15-ns access, 35-ns cycle times

Contextual Info: IBM014405 IBM014405B 1 M x 4 10/10 EDO DRAM Features • 1,048,576 word by 4 bit organization - Active max - 95 mA / 80 mA (3.3V) - 85 mA / 70 mA (5.0V) - Standby Current: TTL Inputs (max) - 2.0 mA - Standby Current: CMOS Inputs (max) - 1.0 mA • Power Supply: 3.3V ± 0.3V or 5.0V ± 0.5V

Contextual Info: IBM0164805B IBM0164805P 8 M x 8 13/10 EDO DRAM Features • 8,388,608 word by 8 bit organization Read-Modify-Write • Single 3.3 ± 0.3V power supply Performance: • Extended Data Out Hyper Page Mode CAS before RAS Refresh - 4096 cycles/Retention Time

Contextual Info: I = = = = ¥ = = = ’ = IB M 1 1 N 2 6 4 5 H IB M 1 1 N 2 7 3 5 H 2M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 2Mx64, 2Mx72 Extended Data Out Page Mode DIMMs applications • System Performance Benefits:

Contextual Info: IBM11N16735B IBM11N16645B IBM11N16735C IBM11N16645C 16M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 16Mx64.16Mx72 Extended Data Out Page Mode DÎMMs • Performance: -60 Wc [RAS Access Time tCAC

Contextual Info: IBM11T1645LP IBM11T1645NP 1M x 64 144 PIN SO DIMM Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses • Optimized for byte-write non-parity applications • System Performance Benefits: - Reduced noise 18 VSs/18VCc pins

Contextual Info: 3D Glasses 8-bit Flash Type MCU HT45FH3T Revision: V1.10 Date: ������������ May 17, 2013 HT45FH3T 3D Glasses 8-bit Flash Type MCU Table of Contents Features. 6

0X8007

Abstract: SERCON816 0xF005 BK7500 SERCOS Reference Manual Z1003 Z1100 ZB7501 MstEarlyErrorCnt 0x8009
Contextual Info: Dokumentation zu den SERCOS interface PCI-Karten FC7501 und FC7502 Version: 1.0 Datum: 08.10.2002 Vorwort Inhaltsverzeichnis FC750x - PCI-Karten für SERCOS 1. Vorwort Hinweise zum Handbuch 4 Sicherheitshinweise 5 2. Produktübersicht 6 Systembeschreibung

ADSL Modem circuit diagram

Abstract: ADSL MODEM PROGRAMMING 100-pin dimm KMM330S104CT S5N8946
Contextual Info: S5N8946 ADSL/CABLE MODEM 4 SYSTEM MANAGER SYSTEM MANAGER OVERVIEW The S5N8946 ADSL/Cable Modem MCU ’s System Manager has the following functions. • To arbitrate system bus access requests from several master blocks, based on fixed priorities. • To provide the required memory control signals for external memory accesses. For example, if a master block