TDD344T Search Results

4lc1m16e5-6

Contextual Info: H ig h P e r f o r m a n t e lM x 16 CM OS DRAM » H A S4C 1M 16E 5 A S4L C 1M 16E 5 A 1 M X 16 CMOS EDO DRAM Preliminary information Features • O rg a n iz a tio n : 1,048,576 w o r d s x 16 b its • 1 0 2 4 re fre s h cycles, 16 m s re fre s h in terv al

Contextual Info: I l i ^ h l*i i loi i n ,iih c S I 2k x X r>V C M O S Ma sh MiPKOM •■ \ S 2 >M 40 A S I ?.KX<S CMOS f ldsli I I f'KOM Preliminary information Features • Low power consumption • Organization: 512KX8 • Sector architecture - 3 0 m A m a x im u m re a d c u rre n t

Contextual Info: High Performance A S7C 256L A S7C 256LL X 32K X 8 C M O S SRA M Low pow er 3 2 K x 8 CMOS SRAM Advance information Features • H ig h sp eed • 2 8 -p in JEDEC standard packages - 600 m il PDIP - 5 5 / 7 0 n s address access tim e - 3 0 / 3 5 n s o u tp u t enable access tim e

mda to vga converter

Abstract: Alliance semiconductor promotion vga pcb data for monitor promotion
Contextual Info: ProMotion-6410 Advanced MultiMedia User Interface Accelerator Databook Alliance Semiconductor • ^00344=5 0000234 b3fl Copyright 1995 Alliance Semiconductor Corporation All rights reserved. Printed in U.S.A. 4/95 1K.cm Alliance Semiconductor reserves the right to make

29F400-70

Abstract: 29f400 programming 29F400 9F400 29F400-90
Contextual Info: H ig h P erfo rm a n ce 512KX8/256KX16 5 V CMOS Flash EEPROM - A S29F400 II J ill r 5 1 2 K x 8 / 2 5 6 K x l 6 CMOS Flash EEPROM Preliminary information Features • O rganization: 5 1 2 K X 8 or 2 5 6 K x l 6 • Sector architecture - One 16K; two 8K; one 32K; and seven 64K byte sectors

Contextual Info: H igh P erfo rm a n ce •■ A S 7 C 1024 H 128Kx8 CMOS SRAM A S7C 31024 1 2 8 K X 8 C M O S SRAM C o m m o n I / O • O r g a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b its • T T L /L V T T L -c o m p a tib le , th r e e - s ta te I / O • H ig h sp ee d

es 3880 fm

Abstract: BBS 8500 manufacturer code rohm AS7C34096 AS7C4096 t9140
Contextual Info: H ig h P e rf o rm a n ce AS7C 4096 A S7 C 34 09 6 5 1 2Kx8 CMOS SRAM A 5 l 2 K x 8 CMOS SRAM Preliminary information Features • Organization: 524,288 w ords x 8 bits • High speed - 1 2 /1 5 /2 0 /2 5 ns address access time - 6 / 7 / 8 / 9 ns output enable access time

Contextual Info: H igh perfo rm an ce 8 M egabit 3V CMOS Flash EEPROM . AS29LV008 II A 8 M eg ab it C M O S F la sh E P R O M Advance inform ation Features • Organization: 1M x 8 • Sector architecture - O ne 16K; tw o 8 • L o w p o w e r c o n s u m p t io n - 10 m A typical re a d c u rre n t

promotion 6410

Abstract: Alliance semiconductor promotion 1995 YUV planar packed format vga crtc P105 P108 TQD344T cga to vga converter 3C011 planar YUV display input
Contextual Info: ProMotion-6410 Advanced MultiMedia User Interface Accelerator Databook Alliance Semiconductor • ^00344=5 0 0 0 0 2 3 4 b3fl Copyright 1995 Alliance Semiconductor Corporation All rights reserved. Printed in U.S.A. 4/95 1K.cm Alliance Semiconductor reserves the right to make

Contextual Info: H ig h P e r fo r m a n c e 1M X 16 CM OS DRAM A S4C 1M 16F5 h I II l M x 1 6 C M O S D R A M fa st paae m od e Preliminary information Features • Organization: 1,048,576 words x 16 bits • High speed • 1024 refresh cycles, 16 ms refresh interval - RA S-only o r CAS-before-RAS re fresh

land pattern for TSOP 2 54 pin

Abstract: TSOP 54 land pattern AS7C1024 AS7C31024 land pattern for TSOP 2 44 PIN
Contextual Info: H igh P erfo rm an ce •■ 128Kx8 A S7C 1024 A S7C 31024 H CMOS SRAM 1 2 8 K X 8 CM O S SRAM C o m m o n I / O Features • O rg a n iz a tio n : 1 3 1 ,0 7 2 w o rd s x 8 b its • H ig h sp e ed - 3 0 0 m il PDIP a n d SOJ - 1 0 / 1 2 / 1 5 / 2 0 n s ad d ress access tim e