T46A Search Results

82378ib

Contextual Info: A P M Ä M ! DM iP© I^[ìfflA'irD@ N] in te i 82378IB SYSTEM I/O SIO Provides the Bridge Between the PCI Bus and ISA Bus Arbitration for PCI Devices — Four PCI Masters are Supported — Fixed, Rotating, or a Combination of the Two 100% PCI and ISA Compatible

sony rxd7

Contextual Info: S O N Y C XD1700 E thernet S w itch Features: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Fully Integrated Ethernet Switch On A Chip Twenty Four 10Base-X Ports, Two 10/100Base-X Ports All Ports can be either Full or Half Duplex Low Per-Port Cost

VIA SL9011

Contextual Info: The FlexSet PC/AT System Controller SL9011 PRELIMINARY FEATURES • AT System Control Logic. • Supports 80286,80386SX P9 , or 80386DX-based Designs. • Up to 25 MHz Performance. • Clock Switching and Reset Logic. • Programmable Wait States for 8 Bit AT Cycles.

74153 mux

Abstract: 82c822 Opti chipset 82C465 pin diagram of 74153 81 pin out diagram of 74138 ic 82C465MV ic 74138 Cyrix 486 dx2 IC 3-8 decoder 74138 pin diagram
Contextual Info: OPTi 82C465MV/MVA/MVB Single-Chip Mixed Voltage Notebook Solution Data Book Revision 2.0 912-3000-016 April, 1995 Copyright Copyright 1995, 1996, OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed,

Contextual Info: Â IW M 1 in te i D M ]F © fô ü iM îrO R !] 82595 ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration for Lowest Cost Solution — Glueless 8-Bit/ 16-Bit ISA/PCMCIA 2.0 Bus Interface — Provides Fully 802.3 Compliant AUI and TPE Serial Interface

dma controller chip

Contextual Info: in tj, 82374EB EISA SYSTEM COMPONENT ESC • Integrates EISA Compatible Bus Controller — Translates Cycles between EISA and ISA Bus — Supports EISA Burst and Standard Cycles — Supports ISA No Wait State Cycles — Supports Byte Assembly/ Disassembly for 8-, 16- and 32-Bit

intel 82350

Abstract: intel 82352 82351 eisa intel 82357 intel 82358 82359 82350DT EISA Chip Set Design Guide 2LF 1418 82350DT
Contextual Info: in te i 82358DT EISA Bus Controller • Supports 82350 and 82350DT Chip Set Based Systems — Mode Selectable for Either 82350 or 82350DT Based Systems — Mode Defaults to 82350 Based Systems ■ Socket Compatible with the 82358 EISA Bus Controller ■ Provides EISA/ISA Bus Cycle

Motorola LSC microcontroller

Abstract: T46A201 t46a 2n3904f 74AC04 motorola LA15 MC68HC05 MC68HC08 MC68HC908JB8 MOTOROLA LSC
Contextual Info: M68EM08JB8UM/D REV. 1 M68EM08JB8 EMULATION MODULE USER’S MANUAL User’s Manual Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any

T44A

Abstract: 80286 microprocessor pin out diagram sl9030 t53a 80387SX weitek ti6a 80387DX 80386 microprocessor pin out diagram via flexset
Contextual Info: The FlexSet PC/AT System Controller SL9011 PRELIMINARY FEATURES • AT System Control Logic. • Supports 80286, 80386SX P9 , or 80386DX-based Designs. • Up to 25 MHz Performance. • Clock Switching and Reset Logic. • Programmable Wait States for 8 Bit AT Cycles.

hst 1025 dr

Abstract: t41b mos 1NTC 82595T T45B S1115 IC 74ALS245 application
Contextual Info: in te i 82595TX ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration for Lowest Cost Solution — Glueless 8-Bit/16-Bit ISA/PCMCIA 2.0 Bus Interface — Provides Fully 802.3 Compliant AUI and TPE Serial Interface — Local DRAM Support up to

QMA INVERTER setting data

Abstract: QMA INVERTER CD2027 486dx isa bios F84031 8042AM 20mhz crystal oscillator dil package BOS 0 206 002 111 F84035 AA244
Contextual Info: CHIPS Product Overview CS4031 CHIPSet • Very low-cost and high-integration chip set ■ 3-2-2-2 or 4-3-3-3 for reads, and 0 or 1WS for writes ■ Supports 486SX, 487SX, 486DX, and 486DX2 CPUs ■ Up to 64MB memory with 4 banks of DRAM or 32MB with 2 banks

T46A

Abstract: hst 1025 t187 t41b mos 82595TX P996 SA10 SA11 SA14 SA15
Contextual Info: 82595TX ISA PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Y Y Optimal Integration for Lowest Cost Solution Glueless 8-Bit 16-Bit ISA PCMCIA 2 0 Bus Interface Provides Fully 802 3 Compliant AUI and TPE Serial Interface Local DRAM Support up to 64 Kbytes FLASH EPROM Boot Support up to

intel 80236

Abstract: T0A 2003 TL67 intel 82595 transformer tl35 Ab 323 isa pcmcia
Contextual Info: A P M & K K D i D M [F [^ [M Ä T D © M in te i 82595TX ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration fo r Lowest Cost Solution — Glueless 8-B it/16-B it ISA /PCM CIA 2.0 Bus Interface — Provides Fully 802.3 Com pliant A ll I

T84A

Abstract: t46a FBC 40A SW82A SW62a LA7117 SW60A LC89982 T71A T17A
Contextual Info: 注文コードNo.N5 5 9 8 No. N 5 5 9 8 12000 新 モノリシックリニア集積回路 LA71170M VHS方式VTR用映像/音声記録再生/信号処理 最大定格／Ｔa=２５℃ 項 目 記 号 条 件 定 格 値 最 大 電 源 電 圧 Vcc

Contextual Info: A G W A K I ! O K lF û i^ ff iifl T O © ^ in le l 82595TX ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration for Lowest Cost Solution — Glueless 8-Bit/ 16-Bit ISA/PCMCIA 2.0 Bus Interface — Provides Fully 802.3 Compliant AUI and TPE Serial Interface

82374EB/82374SB

Contextual Info: Ä I W Ä 1 OMIF ISBM!rD@M in tei 82374EB EISA SYSTEM COMPONENT ESC Integrates EISA Compatible Bus Controller — Translates Cycles between EISA and ISA Bus — Supports EISA Burst and Standard Cycles — Supports ISA No Wait State Cycles — Supports Byte Assembly/

Contextual Info: intJ. 82374EB EISA SYSTEM COMPONENT ESC • Integrates EISA Compatible Bus Controller — Translates Cycles between EISA and ISA Bus — Supports EISA Burst and Standard Cycles — Supports ISA No Walt State Cycles — Supports Byte Assembly/ Disassembly for 8-, 16- and 32-Bit

f84031

Abstract: 8254 aa weitek 486 motherboard schematic CS4031 F84035 486dx isa bios 486dx isa bios pin assignment CC000-CFFFF 80386 chipset
Contextual Info: CS4031 CHIPSet 84031 and 84035 Chip Set Advance Product Information May 1993 P R E L I M I N A R Y Copyright Notice Copyright  1993, Chips and Technologies, Inc. ALL RIGHTS RESERVED. This manual is copyrighted by Chips and Technologies, Inc. You may not reproduce,

Intel 82311

Abstract: 386 MOTHERBOARD
Contextual Info: irrtJ. 82308 Micro Channel BUS CONTROLLER • Micro Channel Compatible Bus Control ■ Supports 8-, 16- or 32-Bit Data Transfers on the Micro Channel ■ Optional Hardware! Enforced I/O Recovery Mechanism ■ Cache Controller 82385 Interface to Maximize Performance for 80386 Based

86C928

Contextual Info: 86C928 GUI Accelerator S 3 In c o rp o ra te d Section 13: Electrical Data 13.1 M AXIM UM RATINGS Table 13-1. Absolute Maximum Ratings A m b ie n t te m p e ra tu re 0 ° C to 7 0 ° C S to ra g e te m p e ra tu re -4 0° C to 125° C DC S upp ly V oltag e

t41b mos

Abstract: hst 1025 pinout BNC -rj45 "aui transformers" HYUNDAI car BNC TO RJ45 WIRING diagram t187 82595TX convertor T175 M-TRON HC49
Contextual Info: 82595TX ISA PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Y Y Optimal Integration for Lowest Cost Solution Glueless 8-Bit 16-Bit ISA PCMCIA 2 0 Bus Interface Provides Fully 802 3 Compliant AUI and TPE Serial Interface Local DRAM Support up to 64 Kbytes FLASH EPROM Boot Support up to

hst 1025 dr

Abstract: T23B hst 1025 CS16 Rev. 2.0 PnP Network Interface
Contextual Info: AQWAOQCB OMIPORI^irOOM in te i 82595TX ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration for Lowest Cost Solution — Glueless 8-Blt/16-Bit ISA/PCMCIA 2.0 Bus Interface — Provides Fully 802.3 Compliant AUI and TPE Serial Interface — Local DRAM Support up to

82306

Abstract: 82308 t46a T30N T30L t44a 386 MOTHERBOARD vga t30f 290167 290187
Contextual Info: in t e i 82308 Micro Channel BUS CONTROLLER Cache Controller 82385 Interface to Maximize Performance for 80386 Based Systems Micro Channel Compatible Bus Control Supports 8-, 16- or 32-Bit Data Transfers on the Micro Channel Low Power CHMOS Technology Optional Hardward Enforced I/O

6H3n triode

Abstract: 6h3n
Contextual Info: 6H3n A b OHHOH TpHOÆ Double triode Æ b o h h o h t p h o ä 6 H 3 I1 npeÄ H a3H aneH ä jih ycH- jieHHH H an p H ^ ieH H H h reH epH pO B aH H H m n e ó a H H H HH3KOH MaCTOTbl. H H 3 K 0 q acT 0 T H b ie ÄBOHHbie TpHOAbi 6H3I1 b h nyCKaiOTCH B MHHHaTIOpHOM 0 J 0pM ^eH H H , B CTeKJIHHHOM Ô ajIJIO H e C ÄeBHTHIUTbipbKOBOH HOJKKOH,