SY100H Search Results

Contextual Info: * DUAL SUPPLY SYNERGY o c ta l e c l-to -ttl S E M IC O N D U C T O R Clockworks s y io o h a b « SY100HA643 DESCRIPTION FEATURES E C L /T T L v e rs io n o f p o p u la r E C L in P S ™ E 1 11 4 0 0 p s w ith in d e v ic e sk ew 8 0 0 p s p a rt-to -p a rt s k e w

Contextual Info: .M i P ln r k W n r k c ^ 3.3V SINGLE SUPPLY 1:9 PECL-TO-TTL SYNERGY PRELIMINARY SY10H641L SY100H641L SEM ICONDUCTOR FEATURES DESCRIPTION • 3 .3 V p o w e r s u p p ly ■ P E C L -to -T T L v e rs io n o f p o p u la r E C L in P S E111 ■ G u a ra n te e d lo w s k e w s p e c ific a tio n

Contextual Info: * S IN G L E S U P P L Y O C T A L SYNERGY Cloc* ° r* ™ P E C L /T T L -tO -T T L SY100H646 S E M IC O N D U C T O R FEATURES • PECL/TTL-to-TTL version of popular ECLinPS E111 ■ Meets specifications required to drive highperformance x86 processors

ic 192 ttl

Contextual Info: 3.3V SINGLE SUPPLY Q UAD V P E C L T O .T T I S YN ER G Y ° WITH LATCHED O UTPUT ENABLE S M tC O N D U C T O R Clockworks PRELIMINARY SY10H842L SY100H842L DESCRIPTION FEATURES • 3.3V power supply ■ Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew

Contextual Info: O SING LE SUPPLY PEC L-TTL 1:4 C LO C K DRIVER SYNERGY S E M IC O N D U C T O R FEATURES S Y ^o'lo'ohS l DESCRIPTION • Translates positive ECL to TTL PECL-TTL The SY10H841 and SY100H841 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24m A TTL output stage, with AC

Contextual Info: SING LE SUPPLY Q U A D P EC L-TO -TTL Clockworks SY10H842 W /LA TC H E D O UTPUT E N A B L E sÈ llb ólÌD U C T O R SY100H842 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise

Contextual Info: * 9-BIT LATCHED ECL-TO -TTL SYNERGY SY10H603 SY100H603 S E M IC O N D U C T O R FEATURES DESCRIPTION 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply

Contextual Info: >0 » 9-BIT ECL-TO-TTL WITH 3-STATE ENABLE SYNERG Y SY10H601 SY100H601 SEMICONDUCTOR DESCRIPTION FEATURES 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise

Contextual Info: * SYNERGY REGISTERED HEX TTL-TO-PECL SY10H606 SY100H606 SEMICONDUCTOR DESCRIPTION FEATURES • Differential 50fì ECL outputs ■ Choice between differential PECL or TTL clock input ■ Single +5V power supply ■ V bb output for single-ended use ■ Multiple power and ground pins to minimize noise

Contextual Info: ClockWorks SY10H841L SY100H841L FINAL 3.3V SINGLE SUPPLY QUAD PECL-TO-TTL W/LATCHED OUTPUT ENABLE DESCRIPTION FEATURES • ■ ■ ■ ■ 3.3V power supply Translates positive ECL to TTL PECL-to-TTL 300ps pin-to-pin skew 500ps part-to-part skew Differential internal design for increased noise

Contextual Info: ClockWorks SY10H641 SY100H641 FINAL SINGLE SUPPLY 1:9 PECL-TO-TTL FEATURES Input frequencies up to 135MHz PECL-to-TTL version of popular ECLinPS E111 Guaranteed low skew specification Latched input Differential internal design VBB output VECL for single-ended operation

Contextual Info: SY10H603 SY100H603 FINAL 9-BIT LATCHED ECL-TO-TTL DESCRIPTION FEATURES Q8 GND Q7 BLOCK DIAGRAM Q6 PIN CONFIGURATION GND VCCT 25 24 23 22 21 20 19 Q4 26 18 Q3 27 17 D8 D7 VCCT 28 16 VCCE Q2 1 15 GND Q1 Q0 2 D6 D5 OEECL D0 D Q Q0 EN D1 D Q Q1 EN D2 D Q TOP VIEW

Contextual Info: SY10H601 SY100H601 FINAL 9-BIT ECL-TO-TTL WITH 3-STATE ENABLE DESCRIPTION FEATURES OEECL OETTL 25 24 23 22 21 20 19 Q4 Q3 26 18 27 17 VCCT Q2 GND Q1 28 D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 Q0 ECL D8 16 TOP VIEW PLCC 1 15 2 14 3 13 4 12 5 6 7 TTL 8 9 D8

mr 4020

Contextual Info: SY10H606 SY100H606 FINAL REGISTERED HEX TTL-TO-PECL FEATURES Differential 50Ω ECL outputs Choice between differential PECL or TTL clock input Single +5V power supply VBB output for single-ended use Multiple power and ground pins to minimize noise Specified within-device skew

Contextual Info: * 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs

Contextual Info: ÌOOlBfll D G G 2 3E S Tfl3 A 3.3V SINGLE SUPPLY QUAD PECI TO TTI Q Y N F R im V S E M IC O N W & -O R WITH LATCHED OUTPUT ENABLE Clockworks^“ PRELIMINARY SY10H842L SY100H842L DESCRIPTION FEATURES • 3.3V power supply ■ Translates positive ECL to TTL PECL-to-TTL

Contextual Info: V C lockworks PRELIMINARY 3.3V SINGLE SUPPLY OCTAL PECL/TTL-to-TTL SYNERGY SEMICONDUCTOR FEATURES SY100H646L DESCRIPTION 3.3V power supply PECL/TTL-to-TTL version of popular ECLinPS E111 Guaranteed low skew specification Three-state enable Differential internal design

Contextual Info: SYNERGY SEMI CO NDUC TO R « 57E D • TQQiaöl 000G37S 754 SINGLE SUPPLY PECL-TTL 1:9 CLOCK DRIVER SYNERGY SEMICONDUCTOR AD VAN CE INFORMATION SY10H641 SY100H641 - r - S Z - 19 FEA TU R ES DESCRIPTION ■ P E C L -T T L version of popular ECLInPS E111 ■ Low skew

Contextual Info: * SYNERGY DUALSUPPLY OCTAL ECL-TO-TTL Clockworks SY100HA643 SEMICONDUCTOR DESCRIPTION FEATURES • ECL/TTL version of popular ECLinPS™ El 11 ■ 400ps within device skew ■ 800ps part-to-part skew ■ Latch ■ Differential internal design ■ V bb output

Contextual Info: SINGLE SUPPLY QUAD PECL-TO-TTL OUTPUT ENABLE SYNERG Y Cl0c1i °r^ '" SY100H842 SEMICONDUCTOR DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise

Contextual Info: V Clockworks PRELIMINARY 3.3V SINGLE SUPPLY QUAD PECL-TO-TTL OUTPUT ENABLE SYNERGY SEMICONDUCTOR o v iS i? !" SY100H842L DESCRIPTION FEATURES • 3.3V power supply ■ Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew

GE-314

Abstract: SY100H842L SY10H842L SY10H842LZC SY10H842LZCTR
Contextual Info: ClockWorks PRELIMINARY SY10H842L SY100H842L 3.3V SINGLE SUPPLY QUAD PECL-TO-TTL OUTPUT ENABLE FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION 3.3V power supply Translates positive ECL-to-TTL PECL-to-TTL 300ps pin-to-pin skew 500ps part-to-part skew

mr 4020

Abstract: H606 SY100H606 SY10H606 SY10H606JC VCCE13
Contextual Info: REGISTERED HEX * p r e l im in a r y T T L -T O -P E C L TRANSLATO R 1 S Y N c rfU Y SEMICONDUCTOR SY10H606 SY100H606 DESCRIPTION FEATURES • Differential 50 £2 ECL outputs ■ Choice between differential PECL or TTL clock input ■ Single +5V power supply

SY100H602

Abstract: SY100H602JC SY10H602 SY10H602JC
Contextual Info: This Material Copyrighted By Its Respective Manufacturer SY10H602 SY100H602 SEM IC O N D U C TO R TR U TH T A B L E Q D LEN MR ENECL L L L H L H L L H H X H L H Qo X X H H L X X X L L DC E LE C TR IC A L C H A R A C T E R IS T IC S V c c t = 5.0V ± 10%; V ee = - 5 .2 V ± 5% 10H Version ; V ee = -4 .5 V ± 0.3V (100H Version)