STP50 Search Results

supersparc

Contextual Info: Preliminary STP5010A SPARC Technology Business November 1994 5 0 MHz SuperSPARC MBus Module DATA SHEET SuperSPARC Only MBus Module D e s c r i p t io n The STP5010A is one of the members of the SuperSPARC based MBus module products. The STP5010A is designed with the latest high performance superscalar SuperSPARC STP1020A micro­

C5027

Abstract: C3519 STP50N06L STP50N06LFI K 286
Contextual Info: STP50N06L STP50N06LFI N - CHANNEL ENHANCEMENT MODE LOW THRESHOLD POWER MOS TRANSISTOR TYPE STP50N06L STP50N06LFI • ■ ■ ■ ■ ■ ■ ■ ■ VDSS R DS on ID 60 V 60 V < 0.028 Ω < 0.028 Ω 50 A 27 A TYPICAL RDS(on) = 0.024 Ω AVALANCHE RUGGED TECHNOLOGY

Contextual Info: 7 ^ 2 3 7 0D4L50L4 f l t. 3 •SGTH SGS-THOMSON ¡LiOT s«S ¡5 7 STP50N06L STP50N06LFI N - CHANNEL ENHANCEMENT MODE LOW THRESHOLD POWER MOS TRANSISTOR TYPE STP 50N 06L STP50N 06LFI V dss R d s ( o ii Id 60 V 60 V < 0 .0 2 8 a < 0 .0 2 8 Q 50 A 2 1 IK ■ TYPICAL RDS(on) = 0.024 Q

Contextual Info: SGS-THOMSON RfflDeiE!<s [l[L[ie,ü’[Ki@RDD S$ STP50NE08 N - CHANNEL ENHANCEMENT MODE SINGLE FEATURE SIZE ” POWER MOSFET TYPE STP50NE08 V d ss R d S ( o ii ) Id 80 V < 0 .0 2 4 Q. 50 A . TYPICAL RDS(on) =0.020 EXCEPTIONAL dv/dt CAPABILITY . 100% AVALANCHE TESTED

free mbus master

Abstract: SuperSPARC VOLTAGE REGULATOR 78 IEEE754 SS20 STP1021A STP5011D STP5011DMBUS75 M-BUS mbus controllers
Contextual Info: STP5011D July 1997 SuperSPARC -II MBus Modules DATA SHEET 75/85 MHz SuperSPARC-II + 1 MB E-Cache DESCRIPTION The STP5011D is the MBus module incorporating the latest SuperSPARC-II microprocessor. This module provides a CPU sub-system with the high performance superscalar SuperSPARC-II microprocessor STP1021A

C5027

Abstract: STP50N06L STP50N06LFI
Contextual Info: STP50N06L STP50N06LFI N - CHANNEL ENHANCEMENT MODE LOW THRESHOLD POWER MOS TRANSISTOR TYPE STP50N06L STP50N06LFI VDSS R DS on ID 60 V 60 V < 0.028 Ω < 0.028 Ω 50 A 27 A TYPICAL RDS(on) = 0.024 Ω AVALANCHE RUGGED TECHNOLOGY 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA AT 100oC

SD-50 diode

Abstract: STP50NE10L
Contextual Info: STP50NE10L  N - CHANNEL 100V - 0.020Ω - 50A TO-220 STripFET POWER MOSFET TYPE STP50NE10L • ■ ■ ■ ■ V DSS R DS on ID 100 V <0.025 Ω 50 A TYPICAL RDS(on) = 0.020 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC

p50ne1

Contextual Info: STP50NE10 N-channel 100V - 0.021Ω - 50A TO-220 STripFET Power MOSFET General features Type VDSS RDS on ID STP50NE10 100V <0.027Ω 50A ) s ( t c u d o ) r s ( P Description t c e t u e d l o o r s Internal schematic diagram P b e O t e l ) o s ( s t

Contextual Info: STP50NE10L N - CHANNEL 100V - 0.020Q - 50A - TO-220 _STripFET POWER MOSFET PRELIMINARY DATA TYPE STP50NE1OL Voss R D S o n Id 100 V <0.025 Î2 50 A . TYPICAL R d s (oii) = 0.020 Q m EXCEPTIONAL dv/dt CAPABILITY . 100% AVALANCHE TESTED . LOW GATE CHARGE AT 100 °C

50NF25

Abstract: mosfet 45a 200v JESD97 STB50NF25 STP50NF25
Contextual Info: STB50NF25 STP50NF25 N-channel 250V - 0.055Ω - 45A - D2PAK - TO-220 Low gate charge STripFET Power MOSFET PRELIMINARY DATA Features Type VDSS RDS on ID Pw STP50NF25 250V <0.069Ω 45A 160W STB50NF25 250V <0.069Ω 45A 160W • 100% avalanche tested ■

STP50NE10L

Abstract: GS 393
Contextual Info: STP50NE10L N - CHANNEL 100V - 0.020Ω - 50A TO-220 STripFET POWER MOSFET TYPE STP50NE10L • ■ ■ ■ ■ VDSS R DS on ID 100 V <0.025 Ω 50 A TYPICAL RDS(on) = 0.020 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC

Contextual Info: 7^2^237 G G 4 b 4 cî 7 ÛT3 «SSTH STP50N06 STP50N06FI SGS-THOMSON id * ! N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR TYPE STP50N06 STP50N06FI . . • . . . . . V dss RDS on Id 60 V 60 V < 0.028 n < 0.028 Q 50 A 27 A TYPICAL Rds(oh) = 0.022 £2

Contextual Info: STP50NE10 N -CHANNEL 100V -0.021 £2- 50A TO-220 STripFET POWER MOSFET TYPE S T P 50 N E 1 0 . . . . . V dss 100 V R d S o Id ii < 0 .0 2 7 Q. 50 A TYPICAL R D S (on) = 0.021 £2 EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 °C

P50NE08

Abstract: p50ne P50ne0 K 3850 N Mosfet Power st microelectronics MOSFET automotive k 3850
Contextual Info: STP50NE08 N - CHANNEL ENHANCEMENT MODE ” SINGLE FEATURE SIZE ” POWER MOSFET TYPE ST P50NE08 • ■ ■ ■ ■ V DSS R DS on ID 80 V <0.024 Ω 50 A TYPICAL RDS(on) = 0.020 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC

STP50NE10L

Contextual Info: STP50NE10L N - CHANNEL 100V - 0.020Ω - 50A - TO-220 STripFET POWER MOSFET PRELIMINARY DATA TYPE STP50NE10L • ■ ■ ■ ■ VDSS R DS on ID 100 V <0.025 Ω 50 A TYPICAL RDS(on) = 0.020 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC

p50ne1

Abstract: P50NE10 p50ne STP50NE10
Contextual Info: STP50NE10 N-channel 100V - 0.021Ω - 50A TO-220 STripFET Power MOSFET General features Type VDSS RDS on ID STP50NE10 100V <0.027Ω 50A • Exceptional high dv/dt capability ■ 100% avalanche tested ■ Low gate charge at 100 oC ■ Application oriented characterization

STP50NE10L

Contextual Info: STP50NE10L N - CHANNEL 100V - 0.020Ω - 50A TO-220 STripFET POWER MOSFET TYPE STP50NE10L VDSS R DS on ID 100 V <0.025 Ω 50 A TYPICAL RDS(on) = 0.020 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC APPLICATION ORIENTED

ym 238

Contextual Info: STP50NE10 N - CHANNEL 100V - 0.021Q - 50A - D2PAK STripFET POWER MOSFET TYPE S TP 50N E10 V dss RDS on Id 1 00 V <0.027 Q 50 A TYPICAL Ftos(on) = 0.021 Q m EXCEPTIONALdv/dt CAPABILITY . . 100% AVALANCHE TESTED . LOW GATE CHARGE AT 100 °C . APPLICATION ORIENTED

Contextual Info: STP50NE10 N - CHANNEL 100V - 0.021 Q - 50A - TO-220 STripFET POWER MOSFET PRELIMINARY DATA TYPE STP50NE10 Voss R D S o n Id 100 V < 0 .0 2 7 Î2 50 A . TYPICAL R d s ( o ii ) = 0.021 Q m EXCEPTIONAL dv/dt CAPABILITY . . . 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 °C

STP50NE10L

Contextual Info: STP50NE10L N - CHANNEL 100V - 0.020Ω - 50A - TO-220 STripFET POWER MOSFET PRELIMINARY DATA TYPE STP50NE10L • ■ ■ ■ ■ VDSS R DS on ID 100 V <0.025 Ω 50 A TYPICAL RDS(on) = 0.020 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC

STP50N05L

Abstract: STP50N05LFI stp50n05 5027A
Contextual Info: STP50N05L STP50N05LFI N - CHANNEL ENHANCEMENT MODE LOW THRESHOLD POWER MOS TRANSISTOR TYPE STP50N05L STP50N05LFI • ■ ■ ■ ■ ■ ■ ■ ■ V DSS R DS on ID 50 V 50 V < 0.028 Ω < 0.028 Ω 50 A 27 A TYPICAL RDS(on) = 0.024 Ω AVALANCHE RUGGED TECHNOLOGY

STP50NE10

Contextual Info: STP50NE10  N - CHANNEL 100V - 0.021Ω - 50A TO-220 STripFET POWER MOSFET TYPE STP50NE10 • ■ ■ ■ ■ V DSS R DS on ID 100 V <0.027 Ω 50 A TYPICAL RDS(on) = 0.021 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC

m-bus c#

Contextual Info: S T P 5011D S un M ic r o e le c t r o n ic s J u ly 1997 SuperSPARC -ll MBus Modules DATA SHEET 75/85 MHz SuperSPARC-II + 1 MB E-Cache D e s c r ip t io n The STP5011D is the M Bus m odule incorporating the latest SuperSFARC-II microprocessor. This m odule pro­

STP50NE08

Contextual Info: STP50NE08 N - CHANNEL ENHANCEMENT MODE " SINGLE FEATURE SIZE " POWER MOSFET TYPE STP50NE08 • ■ ■ ■ ■ V DSS R DS on ID 80 V <0.024 Ω 50 A TYPICAL RDS(on) = 0.020 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC