STA56 Search Results

china model inverter circuit diagram

Abstract: STA5620 tcxo 16.368MHz 2.7V QFN-32 STA5620TR gps clock
Contextual Info: STA5620 Fully integrated RF front-end for GPS Preliminary Data Features • Low IF architecture fIF = 4fO ■ Minimum external components ■ VGA gain internally regulated ■ On chip programmable PLL ■ Typ. 2.7V supply voltage ■ SPI interface ■ 2kV HBM ESD protected

P113H

Abstract: teseo 2 data output ARM7 teseo teseo STA2058 STA8058A STA5620 P113 IR STA8058 5.5MB
Contextual Info: STA8058 TESEO high performance GPS multichip module MCM Data Brief Features • GPS multichip module: – STA2058 TESEO Baseband – STA5620 RF Front-end ■ Complete embedded memory system: – Flash 256 KB + 16 Kbytes – RAM 64 Kbytes. ■ 66-MHz ARM7TDMI 32 bit processor

Contextual Info: STA5620 Fully integrated RF front-end receiver for GPS applications Features • Low IF architecture fIF = 4fO ■ Minimum external components ■ VGA gain internally regulated ■ On chip programmable PLL ■ Typ. 2.7 V supply voltage ■ SPI interface

STA5620

Abstract: ST MICROELECTRONICS MARKING
Contextual Info: STA5620 Galileo-ready RF front-end Data Brief Features • Low IF architecture fIF = 4fO ■ Compatible with GPS L1 and GALILEO signals ■ Minimum external components ■ VGA gain internally regulated ■ On chip programmable PLL ■ 2.7V typ.supply voltage

Contextual Info: STA8058 TESEO high performance GPS multichip module MCM Data brief  production data Features • GPS multichip module: – STA2058 TESEO Baseband – STA5620 RF Front-end ■ Complete embedded memory system: – Flash 256 KB + 16 Kbytes – RAM 64 Kbytes.

STA5620

Abstract: QFN-32 STA5620TR VFQFPN32
Contextual Info: STA5620 Fully integrated RF front-end receiver for GPS applications Features • Low IF architecture fIF = 4fO ■ Minimum external components ■ VGA gain internally regulated ■ On chip programmable PLL ■ Typ. 2.7 V supply voltage ■ SPI interface

Contextual Info: STA5620A STA5620C Fully integrated RF front-end receiver for GPS applications Features • Low IF architecture fIF = 4fO ■ Minimum external components ■ VGA gain internally regulated ■ On chip programmable PLL ■ Typ. 2.7 V supply voltage ■ SPI interface

Contextual Info: STA5620A STA5620C Fully integrated RF front-end receiver for GPS applications Features • Low IF architecture fIF = 4fO ■ Minimum external components ■ VGA gain internally regulated ■ On chip programmable PLL ■ Typ. 2.7 V supply voltage ■ SPI interface

STA5630

Abstract: QFN-32 power supply 12v tcxo 16.368MHz
Contextual Info: STA5630 Low power GPS RF front-end Data brief Features • Integrated LNA ■ Low power consumption < 25 mW ■ 1.8 V supply voltage ■ GPS and Galileo compliant ■ Minimum external components ■ Serial interface ■ 3 bits A/D converter ■ CMOS 65 nm technology

P113H

Abstract: teseo teseo data output ARM7 teseo teseo 2 data output STC tcxo STA5620 STA2058 STA8058 5.5MB
Contextual Info: STA8058 Teseo high performance GPS multi chip module MCM Data Brief Features • GPS Multi Chip Module: – STA2058 Teseo Baseband – STA5620 RF Front-end ■ Complete Embedded Memory System: – Flash 256K+16K bytes – RAM 64K bytes. ■ 66-MHz ARM7TDMI 32 bit processor

P113 IR

Abstract: teseo 2 data output STA8058A 14095 STA8058ATR
Contextual Info: STA8058 TESEO high performance GPS multichip module MCM Data brief − production data Features • GPS multichip module: – STA2058 TESEO Baseband – STA5620 RF Front-end ■ Complete embedded memory system: – Flash 256 KB + 16 Kbytes – RAM 64 Kbytes.

STA5620C

Contextual Info: STA5620A STA5620C Fully integrated RF front-end receiver for GPS applications Features • Low IF architecture fIF = 4fO ■ Minimum external components ■ VGA gain internally regulated ■ On chip programmable PLL ■ Typ. 2.7 V supply voltage ■ SPI interface

STA5630

Contextual Info: STA5630 Low power GPS RF front-end Data brief  production data Features • Integrated LNA ■ Low power consumption < 25 mW ■ 1.8 V supply voltage ■ GPS and Galileo compliant ■ Minimum external components ■ Serial interface ■ 3 bits A/D converter

STA5630

Abstract: 4 MHz tcxo Analog Marking Information st marking code QFN-32 power supply 12v V18-IO VFQFPN32 a1 lna
Contextual Info: STA5630 Low power GPS RF front-end Data brief Features • Integrated LNA ■ Low power consumption <25 mW ■ 1.8 V supply voltage ■ GPS and Galileo compliant ■ Minimum external components ■ Serial interface ■ 3 bits A/D converter ■ CMOS 65 nm technology

VFQFPN32

Contextual Info: STA5630 Low power GPS RF front-end Data brief − production data Features • Integrated LNA ■ Low power consumption < 25 mW ■ 1.8 V supply voltage ■ GPS and Galileo compliant ■ Minimum external components ■ Serial interface ■ 3 bits A/D converter

NMEA0183

Abstract: GPS chip module with antenna smd teseo data output datasheet for vehicle tracking GPS system STA5620 16 channel GPS receiver module GPS DeLorme gps2058 GPS2058-10 GPS chip module with antenna
Contextual Info: www.st.com OEM GPS Solutions July 2008 Highlights • 40 pin Quad SMD package with 16mm x 16mm footprint • 39 second Cold TTFF DELORME GPS2058-10 Module The easy way to integrate GPS into your products • Acquisition sensitivity -146dBm • Tracking sensitivity -159dBm

Contextual Info: STA2058 TESEO baseband High performance single chip GPS baseband with embedded FLASH memory Data Brief Features • Single chip baseband ■ Complete embedded memory system: – FLASH 256K+16K bytes – RAM 64K bytes TQFP64 ■ 66-MHz ARM7TDMI 32 bit processor

STA2064P2

Abstract: sta5630 tfbga289 STA2064 SPDIF i2c converter STA2064N2 STA2064Z2 32F0 Stmicroelectronics gps
Contextual Info: STA2064 Cartesio family Infotainment application processor with embedded GPS Data brief − production data Features • ■ ARM1176 754/624/533 MHz host processor – Cache: 32 KB instruction, 32 KB data – Vector floating point unit High performance embedded GPS subsystem

MPSA56

Abstract: MPSA56 TRANSISTOR MPS-A56 r2g transistor marking code PARI 60V PNP TO-92 MMSTA06 MMSTA56 MPSA06 SSTA06
Contextual Info: STA56 / STA56 / MPSA56 Transistors PNP General Purpose Transistor STA56 / STA56 / MPSA56 ! Features External dim ensions Units : mm 1) BV ceo < -40V (le = -1 mA) 2) Complements the SSTA06 / MMSTA06 / MPSA06. Package, marking and packaging specifications

STA5630

Contextual Info: STA2064 Cartesio family Infotainment application processor with embedded GPS Data brief − production data Features • ■ ARM1176 754/624/533 MHz host processor – Cache: 32 KB instruction, 32 KB data – Vector floating point unit High performance embedded GPS subsystem

ARM926J

Abstract: sta2500 STA2500D STA2062 STA5620 multichannel usb to pcm nand flash sdio cartesio fsmc STA2062A
Contextual Info: Cartesio Application processor for portable navigation PND , in-vehicle navigation and telematics STMicroelectronics is enlarging its infotainment product portfolio with the Cartesio STA2062 system-on-chip. This dramatically reduces the cost of the final application

gt116

Abstract: a56 transistor
Contextual Info: Transistors I PNP General Purpose Transistor STA56/STA56/MPSA56 •Features •External dimensions Units : mm 1 } B V ceo < — 4 0 V (Ic ^ — 1m A) STA56 2 ) Com plem ents the SS T A 06/M M S T A 0 6/M PS A 06 . •P a ckag e, marking and packaging specifications

teseo

Abstract: STA2058 STA5620 teseo 2 data output LFBGA144 LQFP64 STA2058EX usb i2c spi converter 03996E-1
Contextual Info: STA2058 Teseo GPS Platform high-sensitivity baseband Data Brief Features • Single chip baseband with embedded flash ■ Complete embedded memory system: – FLASH 256K+16K bytes – RAM 64K bytes ■ 66-MHz ARM7TDMI 32 bit processor ■ High Performance GPS engine HPGPS

STA5630

Abstract: STA2065 Arm1176 LP SDRAM solution AC97 ARM1176J 32DMA TFBGA372
Contextual Info: STA2065 Cartesio family infotainment application processor with embedded GPS Data brief Features • ARM1176 533/624 MHz host processor – Cache: 32 KB instruction, 32 KB data – Vector floating point unit ■ High performance embedded GPS subsystem – Parallel acquisition engines for 8 GPS