SPI BUS Search Results

AN-300

Abstract: FM25040 FM25160
Contextual Info: AN-300 SPI Bus Compatibility FM25160 16Kb SPI FRAM Overview The FM25160 uses an industry standard SPI interface. When comparing the FM25160 with 16Kb SPI EEPROMs, users may notice two minor operating differences. First, the SPI bus protocol includes 4 modes which may be selected by the

EDGE22

Abstract: FM25040 FM25160
Contextual Info: Application Note SPI Bus Compatibility FM25160 16Kb SPI FRAM Overview The FM25160 uses an industry standard SPI interface. When comparing the FM25160 with 16Kb SPI EEPROMs, users may notice two minor operating differences. First, the SPI bus protocol includes 4 modes which may be selected by the

M95512 diagram

Abstract: M95512-DR M95512-W M95512 M95512-R
Contextual Info: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit

DATASHEET OF SPI protocol

Abstract: FM25040 FM25160
Contextual Info: Application Note SPI Bus Compatibility FM25160 16Kb SPI FRAM Overview The FM25160 uses an industry standard SPI interface. When comparing the FM25160 with 16Kb SPI EEPROMs, users may notice two minor operating differences. First, the SPI bus protocol includes 4 modes which may be selected by the

Contextual Info: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit

M95512

Abstract: M95512-DR M95512-R M95512-W
Contextual Info: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit

EEPROM ST M95256

Abstract: M95256-DR
Contextual Info: M95256-DR M95256 M95256-W M95256-R 256 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface positive clock SPI modes : – M95256, M95256-W and M95256-R: standard SPI 256 Kbit EEPROM – M95256-DR: standard SPI 256 Kbit

AT25DF1281

Abstract: 8MW1 VDFN AT45DBxxx atmel 528 8MW1 - VDFN footprint 8M1-A 8MA1 UDFN 8MW1 8S2 EIAJ SOIC 8cn3
Contextual Info: Density Vcc Min Mbits (V) DataFlash Page Erase Part Number Interface Architecture SPI SPI SPI SPI SPI SPI SPI, Rapid8 Speed (MHz) 66 66 66 66 66 66 66/50 Page-erase, Byte-alterable, 2.7 to 3.6V – Industrial Temperature Grade 2.7 2.7 2.7 2.7 2.7 2.7 2.7

JTAG MODULE SPI

Abstract: spi flash parallel port TSOP 28 SPI memory Package flash 88P8341
Contextual Info: SPI EXCHANGE SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

IDT88P8344

Abstract: 88P8344
Contextual Info: SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

TSX 07 software

Abstract: DPRAM Quad SPI MPC860 ORSPI4-2FE1036C SPI-324P-O4-N1 OIF-SPI4-02
Contextual Info: Quad SPI-3 to SPI-4 PHY Layer Bridge Core April 2004 IP Data Sheet Features – Configurable through the MicroProcessor Interface MPI ORCA 4 System Bus – Programmable parity type on SPI-3 bus • Complete Quad SPI-3 to SPI-4 PHY Layer Bridge Solution Based on the ORCA

TSOP 48 thermal resistance type1

Abstract: IDT88P8342 drw22
Contextual Info: SPI EXCHANGE 2 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

Contextual Info: PRODUCT BRIEF IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

spi FIFO

Abstract: IDT88P8344 DSC-6370
Contextual Info: PRODUCT BRIEF IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

Pm25LD

Abstract: SI1001
Contextual Info: FEATURES 256Kbit Single Operating Voltage Serial Flash Memory With 100 MHz Dual-Output SPI Bus Interface Output SPI Bus Interface Pm25LD025C Memory With 100 MHz DualOutput SPI Bus Interface Memory With 100 MHz Dual-Output SPI Bus Interface • Low Power Consumption

spi on parallel port

Abstract: IDT88P8342
Contextual Info: PRODUCT BRIEF IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

software uart SC16IS740

Abstract: UART abstract AN10428 UART-SPI gateway Philips slave bridges SPI to RS232 SC16IS740 UART-SPI Gateway for Philips SPI slave bridges spi slave cable gateway reference design spi In Circuit Serial Programming
Contextual Info: AN10428 UART-SPI Gateway for Philips SPI slave bridges Rev. 01 — 7 March 2006 Application note Document information Info Content Keywords UART-SPI Gateway, UART to SPI, RS-232 to SPI Abstract The UART-SPI Gateway enables a PC that has a UART port to communicate with a SPI slave device using an RS-232 terminal. With the

PM25LD040-SCE

Contextual Info: FEATURES 4 Mbit Single Operating Voltage Serial Flash Memory With 100 MHz Dual-Output SPI Bus Interface Output SPI Bus Interface Pm25LD040 Memory With 100 MHz DualOutput SPI Bus Interface Memory With 100 MHz Dual-Output SPI Bus Interface • Low Power Consumption

PIC16F872

Abstract: movlw DS1868 16F872 AN169 APP169 DS1267 p16f872
Contextual Info: Maxim > App Notes > DIGITAL POTENTIOMETERS GENERAL ENGINEERING TOPICS INTERFACE CIRCUITS Keywords: 3-wire interface, SPI to 3-wire, SPI bus, digital potentiometers, digital pots, SPI interface, shift register Dec 26, 2001 APPLICATION NOTE 169 Interfacing a DS1868 3-Wire Device to a SPI Bus

Contextual Info: PI7C9X760B I2C-bus/SPI to UART Bridge Controller w/ 64 bytes of TX/RX FIFOs Features ÎÎSingle channel full-duplex UART SPI interface ÎÎSupport I2C-bus or SPI interface ÎÎSupport 20 Mbit/s maximum SPI clock speed ÎÎ64 bytes FIFO transmitter and receiver

AVR151

Abstract: AVR910 SCK 104 avr spi ICE200 STK500
Contextual Info: AVR151: Setup And Use of The SPI Features • • • • • • • SPI Pin Functionality Multi Slave Systems SPI Timing SPI Transmission Conflicts Emulating the SPI Code examples for Polled operation Code examples for Interrupt Controlled operation 8-bit RISC

Tresos

Abstract: UM0565 SPI105 automotive ecu manual SPC563M SPI156 SPI DRIVER autosar autosar can driver
Contextual Info: UM0565 User manual SPC563M SPI driver Introduction This user manual describes the AUTOSAR serial peripheral interface SPI driver. AUTOSAR SPI driver configuration parameters and deviations from the specification are described in SPI driver chapter. AUTOSAR SPI driver requirements and APIs are described

Contextual Info: PI7C9X1170B I2C-bus/SPI to UART Bridge Controller w/ 64 bytes of TX/RX FIFOs Features ÎÎSingle channel full-duplex UART SPI interface ÎÎSupport I2C-bus or SPI interface ÎÎPI7C9X1170B supports 20 Mbit/s maximum SPI clock speed ÎÎ64 bytes FIFO transmitter and receiver

AVR151

Abstract: AVR910 ICE200 STK500
Contextual Info: AVR151: Setup And Use of The SPI Features • • • • • • • SPI Pin Functionality Multi Slave Systems SPI Timing SPI Transmission Conflicts Emulating the SPI Code examples for Polled operation Code examples for Interrupt Controlled operation 8-bit RISC