SOREP SA Search Results

Contextual Info: VL82C322 POWER MANAGEMENT UNIT V / V E R V IE W The VL82C322 Power Managment Unit PMU from VLSI Technology, Inc., dramatically reduces overall system power consumption and provides special features for laptop/notebook PC/AT -compatible computers. The power

delco ic

Abstract: Sorep SA
Contextual Info: VLSI T e c h n o l o g y , i n c . VP18322 T3PM Dual DS3 Framer/Performance Monitor FEATURES • Integrates two full-featured DS3 framer/performance monitors • Decodes a B3ZS-encoded signal and indicates line code violations • Frames to an M23 or C-bit parity

VL82c311

Abstract: VL82C48 vl82c486
Contextual Info: VL82C425 CACHE MEMORY CONTROLLER O v e r v ie w VLSI Technology, Inc.'s VL82C425 is a high-performance, highintegration, single-chip secondlevel cache memory controller for use in the design of 486-based PC/AT-compatible systems. When used with the VLSI SC486

z351

Abstract: SOREP Datasheet of ic 7660 "VLSI Technology Inc." 7442 pin diagram fn521 NE 7555 vlsi technology VP14374QC ANSI T1.403 CISCO
Contextual Info: fee 2 VLSI T e c h n o lo g y , in c . VP14374 QFDL QUAD FACILITY DATA LINK TRANSCEIVER FEATURES DESCRIPTION • Integrates four full-duplex HDLC data link interfaces in a single device The VP14374 QFDL Quad Facility Data Link Transceiver provides termination of

laptop MOTHERBOARD Chip Level MANUAL

Abstract: VL82c311 topcat ibm schematics 80286 80286 microprocessor schematics VL82C106 computer schematics 80286 80286 memory management motherboard laptop schematics vlsi 386sx
Contextual Info: V L S I TEC HNOLOGY INC 47E D B =1300347 GODbflEfl ^ B V T I 'TOPCAT286/386SX" PC/AT-COMPATIBLE CHIP SET The TOPCAT 286/386SX chip set from VLSI Technology, Inc., is a very high-integration chip set for use in the design of PC/AT -compatible based systems. This chip

VL82C331-FC

Abstract: VL82c311 VL82C332-FC 386DX motherboard scamp VLB2C386-SET laptop MOTHERBOARD Chip Level MANUAL VL82C331FC topcat 386sX Single Board Computer
Contextual Info: O v e r v ie w The TOPCAT 386DX chip set from VLSI Technology, Inc., is a very high-integration chip set for use in the design of PC/AT -compatible based systems. This chip set is intended for use in 80386DX microprocessor-based systems with clock speeds from 16 to

Cyrix 486dx

Abstract: VL16C451
Contextual Info: SCAMP IILOW-POWER NOTEBOOK CHIP SET c in O v e r v ie w The VL82C315A SCAMP II System Controller and the VL82C322A SCAMP Power Management Unit PMU provide a high-performance, low-chip count, low-power 16-bit notebook solu­ tion. These devices support fullystatic AMD Am386™ and Cyrix

IESS-308 sCRAMBLER

Abstract: BIT 31936 scrambler satellite v.35 Viterbi Trellis Decoder texas IESS309 IESS-309 33-/BIT 31936
Contextual Info: VLSI Tech n o lo gy , in c . VP17018 RPFEC FORWARD ERROR CORRECTION CIRCUIT FEATURES • Optional selection of differential encoding/decoding insertion for operation at code rates up to 7/8 • Integrates a full-featured convo­ lutional encoder and a Viterbi

R/CHN 041 diode

Contextual Info: V L S I Te c h n o l o g y in c . VGT300 SERIES 1.0-MICRON GATE ARRAY SERIES FEATURES ^ s • Advanced f.O microij/idrawn silicon gate'technutbgy • Seven array sizes from 30,300 to 246,500 available gates • Continuous Gate architecture for maximum layout efficiency

BIT 31936

Abstract: Luscombe Engineering
Contextual Info: VLSI T ec h n o lo g y , in c . VP14374 QFDL QUAD FACILITY DATA LINK TRANSCEIVER FEATURES DESCRIPTION • Integrates four full-duplex HDLC data link interfaces in a single device The VP14374 QFDL Quad Facility Data Link Transceiver provides termination of

TR-TSY-000312

Abstract: Delco tt 2222 Datasheet sorep Nippon capacitors Electra s.r.l. vlsi technology VP14312QC vlsi tech
Contextual Info: -ì ? yH f i p VLSI T ec h n o lo g y , in c . ADVANCE INFORMATION VP14312 DDSX DUAL DSX-1 LINE INTERFACE UNIT FEATURES • Generates and detects programmable in-band loopback code sequences in both framed and unframed DS-1 streams • Integrates two duplex DSX-1

VLSI Technology

Abstract: kt 714 schematic transistor modul trigger pt6005 vlsi design physical verification VGT300 "VLSI Technology Inc." PT6055 GAH 521 fabrimex
Contextual Info: V L S I T ec h n o lo g y , in c . VGT300 SERIES 1.0-MICRON GATE ARRAY SERIES FEATURES s • Advanced f.O microp/fdrawn silicon gate'techrrology • Seven array sizes from 30,300 to 246,500 available gates • Continuous Gate architecture for maximum layout efficiency

8Kx16

Abstract: TA 8825 AN
Contextual Info: VLSI Technology , inc . ADVANCE INFORMATION VT62A168 • VT62A188 8K x18 OR TWO 4K x18 CACHE DATA SRAM FEATURES • High speed access times — Address access times of 25, 35, 45, 55 ns — A12 access direct mapped of 17, 25, 30 ns — Chip select access times of 20, 25,

circuit diagram for speed control for highways

Abstract: VF-8X tt 3043 transistor tt 2222 vlsi technology LA 7555 SERIAL, strobe,clock INPUT PARALLEL sj 3159 TT 2222 VL7C116-QC
Contextual Info: l'i.XÄ 2 6 ÎÎK1 VLSI T ech no lo gy , in c . PRELIMINARY VL7C116 DIGITAL SWITCH MEMORY INTERFACE DSMI FEATURES • Allows easy implementation of digital PCM (Pulse Code Modulation) time slot switch capable of routing any 8-bit time slot of any of the 16 Incoming PCM highways

TEK 461

Abstract: SK TME 86 i on VM009-B 2272 m4 "vlsi technology" VM009 book cook
Contextual Info: MW 4 Mi V L S I Tech no lo gy , in c . VM009 HIGH-SPEED DES DEVICE FEATURES • Supports three ciphering operations: - Electronic Codebook ECB - Cipher Block Chaining (CBC) - Cipher Feedback (CFB) • Three data ports - Master Port - Slave Port - Auxiliary Port

vl16c552

Abstract: lpt port direction bit 5
Contextual Info: VLSI Tech n o lo gy , in c . VL16C552 DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO FEATURES • Three-state TTL drive for the data and control bus on each channel • IBM PC/AT -compatible • Two VL16C550 ACEs • Hardware and software compatible with VL16C452 and VL16C452B

vl82c486

Abstract: Phoenix BIOS VL82C486 bios Phoenix BIOS VL82C486 bios setup KB 7780 the-VL82C486 VL82C48 65ZD tag 8622 TAG7_ equivalent TAG3_ equivalent
Contextual Info: i-1* 3 i TO VLSI T ech n o lo g y , in c. ADVANCE INFORMATION VL82C425 486 CACHE CONTROLLER FEATURES • Single chip second-level cache control­ ler optimized for use with the VL82C486 System Controller • Look-aside architecture allows cache to be board-level option

Multibus ii protocol

Abstract: solna d30 176526 multibus II architecture specification
Contextual Info: V L S I Tech n o lo gy , in c . _ VM82C389 MESSAGE-PASSING COPROCESSOR MULTIBUS II FEATURES DESCRIPTION • Full-function, single-chip interface to Parallel System Bus PSB The VM82C389 Message-Passing Coprocessor (MPC) provides a highintegration interface solution for the

82C389

Contextual Info: V LSI Technology, in c VM82C389 MESSAGE-PASSING COPROCESSOR MULTIBUS II FEATURES DESCRIPTION • Full-function, single-chip interface to Parallel System Bus PSB The VM82C389 Message-Passing Coprocessor (MPC) provides a highintegration interface solution for the

solna d30

Abstract: 74AS1804 AD23-AD16 bsc5 Multibus arbitration protocol AD31-AD24 vlsi technology Multibus ii protocol 8253 programme able interface 893000
Contextual Info: f 1 V L S I Tech n o lo gy , in c . _ VM82C389 MESSAGE-PASSING COPROCESSOR MULTIBUS II FEATURES DESCRIPTION • Full-function, single-chip interface to Parallel System Bus PSB The VM82C389 Message-Passing Coprocessor (MPC) provides a high­

vl82c486

Abstract: VL82c311 bcd to hex decimal vl82c113 VL82C311L vL82c Phoenix BIOS VL82C486 bios TDA 8375 pin voltage vl82c31 Phoenix BIOS VL82C486 bios setup
Contextual Info: V L S I T ech n ology, inc. m W M l E D ^ F Û ^ H ^ T D Û i _ VL82C113/VL82C113A SCAMP COMBINATION I/O FEATURES • Integrated peripheral controller for SCAMP™ VL82C310/VL82C311/ VL82C311L Single Chip PC/AT Controllers

TDA 8375 pin voltage

Contextual Info: VLSI T ec h n o lo g y , in c . VL85C30 ENHANCED SERIAL COMMUNICATIONS CONTROLLER ESCC FEATURES DESCRIPTION • Enhanced SCC functions support DMA - 14-bit byte counter - 19-bit wide FIFO • Low power consuming CMOS The VL85C30 CMOS Enhanced Serial Communications Controller (ESCC) is a

VL16C450

Abstract: VL16C451B Burr Brown PWR 74 91667 vlsi 486 Nippon capacitors traco power tme MARKING traco power txl VL16C451
Contextual Info: V L S I T ec h n o lo g y , in c . VL16C551 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO FEATURES • PC/AT-compatible • Enhanced bidirectional line printer port • 16-byte FIFO reduces CPU interrupts • Independent control of transmit, receive, line status and data set

403252

Contextual Info: •■ > ' N 92 V L S I Technology, inc . RM VM007 DATA ENCRYPTION PROCESSOR FEATURES DESCRIPTION • Complete cryptographic processing system on a single chip • Class 3 ESD protection above 4000V • Supports clock frequencies to 30 MHz • Pending validation by National