VL16C552 Search Results

vl16c552

Abstract: lpt port direction bit 5
Contextual Info: VLSI Tech n o lo gy , in c . VL16C552 DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO FEATURES • Three-state TTL drive for the data and control bus on each channel • IBM PC/AT -compatible • Two VL16C550 ACEs • Hardware and software compatible with VL16C452 and VL16C452B

VL16C451

Abstract: VL16C452B VL16C452 74 TTL PACKAGE OUTLINES VL16C451B VL16C552 VL16C450 VL16C550
Contextual Info: VLSI Technology , inc . VL16C45X • VL16C55X PC/AT -COMPATIBLE UART FAMILY FAMILY FEATURES FAMILY DESCRIPTION • IBM PC/AT-com patible • Individual modem control signals for each channel The universal asynchronous receiver/ transm itter UART serves as serial

st16c553

Contextual Info: STARTECH ST16C553 An 2E* EXflRCompany Printed August 7, 1995 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFO AND PARALLEL PRINTER PORT WITH 83 BYTE FIFO DESCRIPTION PLCC Package The ST16C553 is a dual universal asynchronous receiver and transmitter with 16 byte transmit and

Cyrix 486dx

Abstract: VL16C451
Contextual Info: SCAMP IILOW-POWER NOTEBOOK CHIP SET c in O v e r v ie w The VL82C315A SCAMP II System Controller and the VL82C322A SCAMP Power Management Unit PMU provide a high-performance, low-chip count, low-power 16-bit notebook solu­ tion. These devices support fullystatic AMD Am386™ and Cyrix

VL82C100QC

Abstract: VL82C100-QC VL16C452-QC VL82C101B-QC VL16C552-QC VL82C103 VL82C100
Contextual Info: f VLSI T ech n o lo g y , in c . SELECTOR GUIDE VLSI'S POPULAR 12 MHz CHIP SET VL82CPCAT-QC 12 MHz 0/1 WS s e e s c h e m a t ic , p a g e VL82C100-QC VL82C101B-QC VL82C103A-QC VL82C104-QC 7-9 VL82C102A-QC FEATURES • 100% PC/AT-Compatible • 1 ws/120 ns DRAM, 0 ws/80 ns

laptop MOTHERBOARD Chip Level MANUAL

Abstract: VL82c311 topcat ibm schematics 80286 80286 microprocessor schematics VL82C106 computer schematics 80286 80286 memory management motherboard laptop schematics vlsi 386sx
Contextual Info: V L S I TEC HNOLOGY INC 47E D B =1300347 GODbflEfl ^ B V T I 'TOPCAT286/386SX" PC/AT-COMPATIBLE CHIP SET The TOPCAT 286/386SX chip set from VLSI Technology, Inc., is a very high-integration chip set for use in the design of PC/AT -compatible based systems. This chip

16C552

Abstract: VL16C552
Contextual Info: XR-16C552 C 'E X A R Dual Universal Asynchronous Receiver and Transmitter with FIFO and Parallel Printer Port GENERAL DESCRIPTION The XR-16C552 is a dual universal asynchronous receiver and transmitter with FIFO, a bidirectional CENTRONICS type parallel printer port, and modem

VHDL CODE FOR PID CONTROLLERS

Abstract: ARM JTAG Programmer Schematics serial programmer schematic diagram for arm 7tdmi APS 226 PSU vhdl code for rs232 receiver using fpga application applications of 32bit microprocessor using fpga ARM 7TDMI 32 BIT MICROPROCESSOR HBI-0011B LOG RX 2 1301 16 pin IC mini project using ARM microcontroller
Contextual Info: ARM Target Development System User Guide Issued: ARM DUI 0061A March 1997 Copyright ARM Ltd. 1997 ENGLAND GERMANY ARM 90 Fulbourn Road Cherry Hinton Cambridge CB1 4JN UK Telephone: +44 1223 400400 Facsimile: +44 1223 400410 Email: info@arm.com ARM Otto-Hahn Str. 13b

VL16C450

Abstract: VL16C451B Burr Brown PWR 74 91667 vlsi 486 Nippon capacitors traco power tme MARKING traco power txl VL16C451
Contextual Info: V L S I T ec h n o lo g y , in c . VL16C551 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO FEATURES • PC/AT-compatible • Enhanced bidirectional line printer port • 16-byte FIFO reduces CPU interrupts • Independent control of transmit, receive, line status and data set

Contextual Info: STARTECH ST16C552 A n J P E X f lR C o m p a n y PrintedAugust 16,1996 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFO AND PARALLEL PRINTER PORT WITH POWER DOWN CAPABILITY DESCRIPTION PLCC Package The ST16C552 is a dual universal asynchronous receiver and transmitter with 16 byte transmit and

VL82C331-FC

Abstract: VL82c311 VL82C332-FC 386DX motherboard scamp VLB2C386-SET laptop MOTHERBOARD Chip Level MANUAL VL82C331FC topcat 386sX Single Board Computer
Contextual Info: O v e r v ie w The TOPCAT 386DX chip set from VLSI Technology, Inc., is a very high-integration chip set for use in the design of PC/AT -compatible based systems. This chip set is intended for use in 80386DX microprocessor-based systems with clock speeds from 16 to

Contextual Info: XR-16C552 Z S ’ E X q R Dual Universal Asynchronous Receiver and Transmitter with FIFO and Parallel Printer Port GENERAL DESCRIPTION PIN ASSIGNMENT The XR-16C552 is a dual universal asynchronous receiver and transmitter with FIFO, a bidirectional CENTRONICS type parallel printer port, and modem

Startech

Abstract: INS8250 NS16C550 ST16C552 ST16C552CJ68 ST16C552IJ68 WD16C552 Baud Rate Generator programming table 16552
Contextual Info: STARTECH ST16C552 Printed August 7, 1995 An 35* EXf4RCompany UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFO AND PARALLEL PRINTER PORT DESCRIPTION PLCC Package The ST16C552 is a dual universal asynchronous receiver and transmitter with 16 byte transmit and

16C552

Contextual Info: ST16C552 STARTECH Printed September 8,1994 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFO AND PARALLEL PRINTER PORT DESCRIPTION PLCC Package The ST16C552 is a dual universal asynchronous receiver and transmitter with 16 byte transmit and receive FIFO and a bi-directional CENTRONICS type

Contextual Info: STARTECH ST16C552 An 25*EJWRCompany Printed A ugust 7, 1995 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFO AND PARALLEL PRINTER PORT DESCRIPTION PLCC Package The ST16C552 is a dual universal asynchronous receiver and transmitter with 16 byte transmit and

16C552

Abstract: XR-16C552CJ MTL ICC 311 MTL ICC 301 VL16C552 IOR50 CDA 5.5 Mhz XR-16C552 16C552C cdb 404
Contextual Info: EXAR CORP 50E » 3 4 2 2 blfl O O O b O b G IEXR bSI XR-16C552 S ’ E X q R T - 75- 77- 0^ Dual Universal Asynchronous Receiver and Transmitter with FIFO and Parallel Printer Port GENERAL DESCRIPTION The XR-16C552 is a dual universal asynchronous receiver and transminer with FIFO, a bidirectional

vl16c552

Abstract: VL16C452 88C681 UART TTL buffer 68C681
Contextual Info: EXAR UART UART Product Selection Guide Part Number Supply Technology Voltages Package Description Product Features XR-16C450 Asynchronous Receiver and Transmitter Pin and Functional Compatible to INS8250 Includes Modem Control Signals Programmable Character

VL82C107

Abstract: VL82C311 IC receiver delco DM 164 AL 60 dv 1419 SA9C VL82C107-FC SCAMP VL82C310 vl82c31 SD11011
Contextual Info: V L S I T e c h n o lo g y , in c . N]( \M M VL82C107 SCAMP COMBINATION I/O FEATURES • Integrated peripheral controller for SCAMP™ VL82C310/VL82C311 Single Chip PC/AT Controllers • PC memory card interface • 8 - or 16-bit PC memory card support

vl16c552

Abstract: ST16C552 ST16C552IJ68 WD16C552 INS8250 NS16C550 ST16C450 ST16C550 ST16C552CJ68
Contextual Info: ST16C552 STARTECH An Company Printed August 16, 1996 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFO AND PARALLEL PRINTER PORT WITH POWER DOWN CAPABILITY DESCRIPTION PLCC PLCC Rev. 3.0 CDB* GND RIB* DSRB* CLK CSB* GND BIDEN ACK PE BUSY* SLCT VCC ERROR

lg r40 MOTHERBOARD CIRCUIT diagram

Abstract: palce programmer schematic lg tv electronic board schematic R5432 IHI-0001 PALCE mach210 programming EOI-0012 NBW4 VG-468 HP1650B
Contextual Info: hrg.book Page i Wednesday, July 22, 1998 9:18 AM ARM Development Board ARM7TDMI Version Document number: ARM DUI 0017C Issued: March 1997 Copyright ARM Limited 1997 ENGLAND GERMANY ARM 90 Fulbourn Road Cherry Hinton Cambridge CB1 4JN UK Telephone: +44 1223 400400