AUSTEK Search Results

1mx1 DRAM

Abstract: AA2035 UM82C380 256KB static RAM 6182s UM82152 UM82C384 AADS PA10 Unicorn Microelectronics
Contextual Info: UNICORN MICROE LE CTRON ICS E4E D • =1270700 QOQOTOH T ■ UM82C389 Austek Cache Interface I General Description The UM82C389 Cache Interface Chip is one of the UMC UM82C380 series High End AT HEAT chip set. As a DRAM controller, UM82C389 works in tandem with

Z765A

Abstract: um82c211 CS82C215 smc 9216 um6845 82288 VTI16451 UM587
Contextual Info: UNITED MICROELECTRONICS 30E D • 'Tr^-3-^Qi 1355555 D O P P I A □ ■ CROSS REFERENCE GUIDE MICROPROCESSOR UMC ROCKW ELL UM6B02 R6502 PC M AIN BO ARD CHIPS UMC ACER AUSTEK H A R R IS M1101 UM82C088 UM82C206 CS82C206 UM82C211 CS82C211 UM82C212 CS82C212 UM82C215

Contextual Info: U N IT E D M IC R O E L E C T R O N IC S BDE T 3 2 S f lS E D D D O D lt ? 3 U M 8 2 C 3 8 9 AUSTEK Cache interface Features • Supports a flexible system memory configuration: a. 1M ,2M or 3M using 256K x 1 DRAM b. 4M, 8M or 12M using 1M x 1 DRAM ■ Uses normal page DRAM Static column is unnecessary

pipeline architecture for 80386

Abstract: intel 80386 80386 specification update pinout 80386 intel 80386 pin diagram pipeline ARCHITECTURE OF 80386 80386 cache intel 80386 bus architecture intel 80386 block diagram cache memory OF intel 80386
Contextual Info: Austek Microsystems A38152 External Specification 1. Austek A 38152 Microcache for Intel 8 0386 Microprocessor-Based System s « Low-cost, high-performance solution for the 80386 • Interfaces directly with 80386 16-MHz CPU cache the • Supports boot mapped I/O

pin out of 80386 microprocessor

Abstract: 80386 microprocessor 80386 microprocessor functional block diagram pipeline architecture for 80386 80386 microprocessor pin out diagram 80386 microprocessor architecture microprocessor 80386 pin out diagram intel 80386 pin configuration of intel 80386 i80386
Contextual Info: au stek MICROSYSTEMS A38152 Microcache Austek A38152 Microcache for Intel 80386 microprocessor-based systems • 32-kitobyte cache for Intel 80386 MPU supports zero wait state operation • Four-way set-associative architecture • Direct interface to 80386 MPU and memory

Non-Pipelined processor

Abstract: A38152 80386
Contextual Info: Austek Microsystems A38152 External Specification 1. Waveform Descriptions 1.1 Read Hit Cycle The processor initiates a cycle by presenting the address on a d d r 31-2 and b e 3-0# during th e Tstate prior to the two cache access cycles. This is designated Tx in figure 1. Tx can be eith e r a

austek

Contextual Info: UNITED MICROELECTRONICS U M 8 2 ÍS 2 3QE D =1325052 00 001 72 7 5 3 33-.31 - Cache Controller Features • ■ ■ ■ Controls 32-kB, 4-way r set-associative cache Available in 16-MHz, 20-MHz, and 25-MHz speeds Direct interface to the 80386 Direct interface to industry-standard 8K x 8 SRAMs:

austek

Abstract: A38152 UM82152
Contextual Info: UNITED MICROELECTRONICS UM 821S2 3QE 1 » 13BS8SB 0 0 0 0 1 7 5 ? • ~T^5 3 - 3 3 - < 3 l Cache Controller Features ■ ■ ■ ■ Controls 32-kB, 4-way r set-associative cache Available in 16-MHz, 20-MHz, and 25-MHz speeds Direct interface to the 80386

VL82C331-FC

Abstract: VL82c311 VL82C332-FC 386DX motherboard scamp VLB2C386-SET laptop MOTHERBOARD Chip Level MANUAL VL82C331FC topcat 386sX Single Board Computer
Contextual Info: O v e r v ie w The TOPCAT 386DX chip set from VLSI Technology, Inc., is a very high-integration chip set for use in the design of PC/AT -compatible based systems. This chip set is intended for use in 80386DX microprocessor-based systems with clock speeds from 16 to

bios phoenix

Abstract: 80387 interface 80386 80387 INTEL 80386 25 82385 SAB 80287 intel 80386 motherboard, AA93 ami bios 32 pin ami 32 pin bios
Contextual Info: UNITED MICROELECTRONICS 3QE D ^355555 □□□□!5 U M 8 2 C 3 8 0 Series Page Mode 20 This Material Copyrighted By Its Respective Manufacturer M • H H -Q UNITED MICROELECTRONICS 30E D ^355555 ODDOlhO D ■ ~ r _q_q -J r f j U M 8 2 C 3 8 0 Series INTEL Cache Mode

82C486

Abstract: HEADLAND ht 18 ICS1394 82c496 AV9116 HTK340 HT216-32 Headland Technology Product Group headland technology 486 motherboard HT216
Contextual Info: LSI lock; HT216-32 Local Bus VGA Controller Features support efficient concurrent processing at high CPU clock rates • HT216 Local Bus VGA with 32 bit CPU data and address interface Resolutions up to 1024x768x256 colors non-interlaced and 1280x1024x16 inter­

d774

Abstract: d778 b778 58C65 08CB 27HC642 58c256 df4a SIGNETICS 87C256 57C49B
Contextual Info: 40M I0I Device Support Rev 14.2 4 1M10 i Device Support (Rev 15.0) 42M I0I Device Support (Rev 14.1) (November 1994) Please note: Any device indicated by => is a new addition to the ydevice support list. S T A G PROORAMMCR3 Stag Programmers Limited Silver Court Watchmead Welwyn Garden City Herts AL7 ILT

Contextual Info: UNITED MICROELECTRONICS 3QE D ^355555 □□□015 M • T - i4 . ° | U M 8 2 C 3 8 0 Series Page Mode Features ■ Highly integrated 25MHz/0 wait state 80386 PC/AT compatible ■ 32-bit memory bus interface ■ Slow DRAM 100/80 ns at 20/25 MHz 0 wait state

Robinson Nugent CATALOG

Abstract: MC68461 SAB80286 WE32104 Z80000 IMST414 FGE2000 MCA2800ALS 82786 intel TC110G
Contextual Info: T Circuit C o m p o n en ts Inc. r MicrofQ 3000 PGA Decoupling Capacitors Micro/Q 3000 ceramic capacitors are a family of very low inductance decoupling capacitors specifically designed to be through-hole mounted under pin grid arrays PGAs , PGA sockets, and