SO16D Search Results

DN74LS193

Contextual Info: DN74LS193 LS T T L DN74LS Series D 7 N 4 L S 1 9 3 Synchronous 4 - b it Binary U p /D o w n Dual Clock Counters with R eset • Description P-2 D N 7 4 LS 1 9 3 is a synchronous hexadecim al (4-bit b in ary) up/down counter w ith direct-coupled reset input and set

Diode RL 4B

Abstract: DN74LS158 MA161
Contextual Info: LS TTL DN74LS Series DN74LS158 DN74LS158 Quad 2 -lin e to 1 -lin e Data S electors / Multiplexers • Description P -2 D N 74LS158 contains four 2-line to 1-line data selector/ m ultiplexer circuits. ■ Features • • • • • Inverted o u tp u t C om m on enable in p u t for all fo u r circuits

LM358 equivalent

Abstract: lm324 equivalent lm393 equivalent DATA SHEET OF TL084 OPAMP NE556 PWM TL082 opamp 24v dc motor speed control lm324 lm339 astable NE555 PWM 500khz tsm103 application
Contextual Info: Selection of Operational Amplifiers ● LS404 MC33078 MC33171/2/4 ● ● MC3403 TL071/72/84 ● TS271 ● ● Tem p erat ure Oth feat er ures Ra n Not ge e3 V ge Ra n ply Sup M OU INIMU TPU T SW M IN G (V) SR ( V/µ st yp.) GBP (MH z ty p.) tem Ib max

Contextual Info: LS TTL DN74LS Series DN74LS85 DN74LS85 Dî0 7fi$g5 4- bit Magnitude Comparators • P-2 Description DN74LS85 is a 4-bit digital comparator. ■ Features • Number o f bits easily increased • Low output impedance • Wide operating temperature range Ta = -2 0 to +75 C

Contextual Info: LS TTL DN74LS Series DN74LS365A DN74LS365A 141S&S3Y Hex Bus Drivers with 3-state Outputs • Description DN74LS365A contains six 3-state output buffer circuits with common output-control inputs Gi and G2 . P-2 ■ Features • High fan-out (I ol = 24mA, Ioh = —2.6mA)

Contextual Info: AN5902S OTHERS AN5902S Switching Regulator Control Circuit • Outline Unit : mm T he AN5902S is a sw itching reg u lato r control integrated circuit designed for b a tte ry drive sm all equipm ent and can be used for ° i —i n n both insulation type and non-insulation type.

Contextual Info: LS TTL DN74LS Series DN74LS395A DN74LS395A 4 - bit Cascadable Shift Registers with 3 -sta te Outputs • Description P -2 D N 7 4 L S3 9 5 A is a 4-b it serial/parallel input to serial/parallel output shift register w ith 3-state outputs. ■ Features • Synchronous serial/parallel input to serial/parallel output

Contextual Info: LS TTL DN74LS Series DN74LS158 DN74LS158 Quad 2 -lin e to 1-line Data Selectors / Multiplexers • Description P -2 DN74LS158 contains four 2-line to 1-line data selector/ multiplexer circuits. ■ Features • • • • • Inverted output Common enable input for all four circuits

Contextual Info: LS TTL DN74LS Series DN74LS157 D N 7 4 L S 1 5 7 Quad 2 -line to 1-lin e Data S electo rs/ Multiplexers • Description P-2 DN74LS157 contains four 2-line to 1-line data selector/ multiplexer circuits. ■ Features • Common enable input for all four circuits

Contextual Info: LS TTL DN74LS Series DN74LS191 D N 7 4 L S 191 Synchronous 4 -b it Binary U p /D o w n Counters with U p /D o w n Mode Control • Description P-2 DN74LS191 is a synchronous 4-bit binary (hexadecim al) co u ter w ith u p /d o w n control inputs and set input.

Contextual Info: PANASONIC INDL/ELEK -CIO d E | LT35Û 52 000500e] 5 J~_ MN4044B/MN4044BS 66C 0 5009 D 01-/5 CMOS Logic MN4000B Series 6932852 PANASONIC INDLtELECTRONIC MN4044B / MN4044BS Quad R /S Latches • Description P- 3 The MN4044B/S have built-in quad independent R/S flip-flops.

Contextual Info: I LS TTL DN74LS Series DN74LS83A DN74LS83A 4 - bit Binary F u ll Adders with F a st Carry • Description P -2 DN 74LS83A is a 4-bit full-adder w ith a “look-ahead” carry. ■ • • • Features “ Look-ahead” carry for high speed Partial “look-ahead” carry for system capability

n74hc4049

Contextual Info: High-Speed CMOS Logic MN74HC Series MN74HC4049/MN74HC4049S MN74HC4049/ MN74HC4049S Hex Inverting Logic Level Down Converters • Description P -3 M N74HC4049/M N 74HC4049S are inverting lojic level down converters which function to correct input protection construc­

Contextual Info: I LS TTL DN74LS Series DN74LS368A DN74LS368A Hex Bus Drivers with 3-state Outputs • Description P-2 DN 74LS368A contains six 3-state o u tp u t inverter buffer circuits w ith outp u t-control inputs G! and G2 for four and two circuits respectively. ■ Features

Contextual Info: DN74LS194A LS TTL DN74LS Series DN74LS194A 4 -b it Bidirectional Universal Shift R egisters • Description DN74LS194A is a bidirectional 4-bit serial/parallel input to serial/parallel output shift register. ■ • • • • • • P-2 Features Synchronous serial/parallel input to serial/parallel output

Contextual Info: LS TTL DN74LS Series DN74LS123 D N 7 4 L S 1 2 3 Dual R etriggerable Monostable M ultivibrators w ith R eset • D escription P-2 DN74LS123 contains two retriggerable monostable multi­ vibrator circuits with direct-coupled reset input terminals. ■ Features

AN8800SC

Abstract: AN6781 MN6105 AN8803 AN8802SC MN6076 AN7164 AN8801SC AN6221 multi channel hifi security system
Contextual Info: ICs/LSIs for Audio I For Compact Disc Player Type No. Operating Voltage V Process Functions Package No. Digital servo processor 44-QFP U6 4 ~ 5.5 Digital signal processing LSI, digital signal processing LSI for intermediate/leader audio 84-Q FP L59 MN6622

Contextual Info: LS TTL DN74LS Series DN74LS490 KH4U4qo DN74LS490 Dual 4 -bit Decade Counters • D escrip tio n DN 74LS490 contains two asynchronous decade counter circuits with direct coupled reset input and nine direct-coupled set inputs. P -2 ■ Features • Two circuits corresponding to LS90 and L S290 for high

74LS192 PIN CONFIGURATION

Contextual Info: LS TTL DN74LS Series DN74LS192 DN74LS192 lv>7^ i£ R % Synchronous BCD Up / Down Dual Clock Counters with Reset • Description P-2 D N 74LS192 is a synchronous decade u p/dow n counter w ith direct-coupled reset in p u t and set input. ■ • • • •

SO14E

Abstract: so8b so6a SO24C so8e so48 SO34A SO16E Package SO8C SO36B
Contextual Info: Ironwood Electronics Appendix D AP-D.1 APPENDIX D SOIC Chip Package Specifications: • SOIC with Gull Wing Leads . . . . . . . . . . . . . .page AP-D.2 thru AP-D.5 • SOIC with J-Leads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .page AP-D.6

DN74LS112

Abstract: MA161
Contextual Info: LS TTL DN74LS Series DN74LS112 DN74LS112 Dual J-K Negative Edge-Triggered F lip-F lops with S et and Reset • P-2 Description D N 7 4 L S 1 1 2 c o n ta in s tw o negative-edge trig g ered J-K flip ­ flo p c irc u its, e ac h w ith in d e p e n d e n t clock-C P , J , K , an d

T13V

Abstract: DN74LS258A
Contextual Info: LS TTL DN74LS Series DN74LS258A DN74LS258A Quad 2 -lin e to 1-lin e Data Selectors / Multiplexers with 3 -sta te Outputs • D e scrip tio n P-2 DN74LS258A contains four 2-line to 1-line data selector/multi­ plexer circuits with 3-state outputs. ■ Features

DN74LS251

Contextual Info: DN74LS251 LS T TL DN74LS Series DN74LS251 M?4uS^Si 8 -lin e to 1 -lin e Data S e le c t o r s / M ultiplexers with 3 -s ta te Outputs • Description D N 7 4 LS2 5 1 P-2 is an 8-line to 1-line data selector/multiplexer w ith 3-state outputs. ■ Features

Contextual Info: LS TTL DN74LS Series DN74LS366A DN74LS366A 74 L Hex Bus Drivers with 3-sta*e Outputs • Description DN74LS366A contains six 3-state output inverter buffer circuits with common output-control inputs Gi and G2 . P-2 ■ Features • Common output-control inputs for all six circuits