SN74LVC Search Results

LVC244

Contextual Info: I SN74LVC241 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SGAS343 - MARCH 1994 DB, DW, OR PW PACKAGE TOP VIEW E P IC (Enhanced-Performance Implanted CMOS) Submicron Process Typical V q lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C Typical V q HV (Output V qh Undershoot)

Contextual Info: SN74LVC540 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch DB, DW, OR PW PACKAGE (TOP VIEW) • EPIC (Enhanced-Performance implanted CMOS) Submicron Process

Contextual Info: SN74LVC137 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH ADDRESS LATCHES SCAS340 - MARCH 1994 » EPIC Enhanced-Performance Implanted CMOS Submicron Process • Typical V o lp (Output Ground Bounce) D, DB, OR PW PACKAGE (TOP VIEW) A[ B[ c[ Ü2A [ S2B[ G1[

Contextual Info: SN74LVC16543 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS 3CAS317A- NOVEMBER 1993 - REVISED OCTOBER 199S | • Member of the Texas Instruments Wldobua Family • EP/C™ Enhanced-Performance Implanted CMOS Submicron Process • Typical V q l p (Output Ground Bounce)

Contextual Info: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS M ARCH 1993 OB, DW, OR PW PACKAGE TOP VIEW • Space-Saving Package Option: Shrink Small-Outline Package (DB) Features EIAJ 0.65-mm Lead Pitch • EPIC (Enhanced-Performance Implanted

Contextual Info: I SN74LVC158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS342 - MARCH 1994 D, DB, OR PW PACKAGE TOP VIEW EPIC (Enhanced-Performance Implanted CMOS) Submicron Process Typical V q l p (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C

Contextual Info: SN74LVC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET JANUARY 1993 D, DB, OR PW PACKAGE TOP VIEW • EPIC (Enhanced-Performance Implanted 1CCR [ 1 1D [ 2 CMOS) Submicron Process • 1CLK [ 3 Designed to Facilitate Incident Wave

SN74LVC16544

Contextual Info: SN74LVC16544 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCAS351 - MARCH 1994 Member of the Texas Instruments Wldebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process DGG OR DL PACKAGE ftOP VIEW) 1ÜÊÂB[ 1 Typical V q l p (Output Ground Bounce)

SN74LVCC4245

Contextual Info: SN74LVCC4245 OCTAL BUS TRANSCEIVER WITH ADJUSTABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS _ SCAS584A - NOVEMBER 1696 - REVISED JANUARY 1997 EPICrM Enhanced-Performance Implanted CMOS Submicron Process DB, DW, OR PW PACKAGE

Contextual Info: SN74LVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCAS279B-JANUARY 1993 - REVISED JULY 1995 I • EP/C Enhanced-Performance Implanted CMOS Submicron Process • ESD Protection Exceeds 2000 V Per MII-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

SN74LVC16245

Contextual Info: SN74LVC16245 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS I SCAS314 - NOVEMBER 1993 - REVISED MARCH 1994 DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Wldebus Family EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process E 1DIR ,

A910D

Contextual Info: SN74LVC863 9-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS MARCH 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch • EPIC (Enhanced-Performance Implanted CMOS) Submicron Process • Designed to Facilitate Incident Wave

Contextual Info: SN74LVC16952 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCAS320 - NOVEMBER 1993 - REVISED MARCH 1994 Member of the Texas Instruments Wldebus Family DOG OR DL PACKAGE TOP VIEW EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process 10EA B L 1

Contextual Info: SN74LVC157 QUADRUPLE 2-LINE TO 1-UNE DATA SELECTOR/MULTIPLEXER SCAS292B-JANUARY 19 9 3 - REVISED JULY 1995 I • EPIC Enhanced-Performance Implanted CMOS Submicron Process • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model

Contextual Info: SN74LVC863 9-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS31OA - M A RCH 1993 - REVISED JULY 1996 • EPIC Enhanced-Performance Implanted CMOS Submicron Process • Typical V q l p (Output Ground Bounce) < 0.8 V at Vcc = 3.3 V, TA = 25°C | DB, DW, OR PW PACKAQE

Contextual Info: SN74LVC16240 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS312 - NOVEMBER 1993 - REVISED MARCH 1994 Member of the Texas Instruments Wldebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Typical V q l p (Output Ground Bounce) < 0.8 V at VCc = 3.3 V, TA = 25°C

SN74LVC162244

Contextual Info: SN74LVC162244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS I SCAS546 - OCTOBER 1995 10Ê 1Y1 1Y2 GND 1Y3 1Y4 Output Ports Have Equivalent 26-Q Series Resistors, So No External Resistors Are Required Typical V q l p Output Ground Bounce < 0.8 V at Vc c = 3.3 V, TA = 25°C

Contextual Info: SN74LVCU04 HEX INVERTER SCAS282B - JANUARY 1993 - REVISED JULY 1995 D, DB, OR PW PACKAGE TOP VIEW • EP/C (Enhanced-Performance Implanted CMOS) Submicron Process I • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model

Contextual Info: SN74LVC16244A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS 3CES081A - DECEMBER 1 9 95 - REVISED JANUARY 1998 DQQ OR DL PACKAOE TOP VIEW Member of the Texas Instruments Wldebus Family EP/C™ (Enhanced-Performance Implanted CMOS) Submicron Process Typical V q l p (Output Ground Bounce)

Contextual Info: SN74LVCH162244A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS545G – OCTOBER 1995 – REVISED JUNE 1999 D D D D D D D D D D D DL OR DGG PACKAGE TOP VIEW Member of the Texas Instruments Widebus  Family EPIC  (Enhanced-Performance Implanted CMOS) Submicron Process

Contextual Info: SN54LVC652A, SN74LVC652A OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCAS303H – JANUARY 1993 – REVISED AUGUST 1998 D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN74LVC126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCAS339H – MARCH 1994 – REVISED OCTOBER 1998 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: SN54LVC373A, SN74LVC373A OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCAS295J – JANUARY 1993 – REVISED JUNE 1998 D D D D D D description SN54LVC373A . . . J OR W PACKAGE SN74LVC373A . . . DB, DW, OR PW PACKAGE TOP VIEW OE 1Q 1D 2D 2Q 3Q 3D

Contextual Info: SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D – JUNE 2000 – REVISED DECEMBER 2000 D D D D DBV OR DCK PACKAGE TOP VIEW Supports 5-V VCC Operation Input and Open-Drain Output Accept Voltages up to 5.5 V Latch-Up Performance Exceeds 100 mA Per