SN74LVC841 Search Results

Contextual Info: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS M ARCH 1993 OB, DW, OR PW PACKAGE TOP VIEW • Space-Saving Package Option: Shrink Small-Outline Package (DB) Features EIAJ 0.65-mm Lead Pitch • EPIC (Enhanced-Performance Implanted

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307I – MARCH 1993 – REVISED AUGUST 2002 D D D D D D D D D Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 6.7 ns at 3.3 V Typical VOLP Output Ground Bounce

Contextual Info: I T SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307A-MARCH 1 9 9 3 -REVISED JULY 1995 DB, DW, OR PW PACKAQE TOP VIEW • EPIC (Enhanced-Performance Implanted CMOS) Submicron Process • Typical Volp (Output Ground Bounce) < 0.8 V at Vcc = 3.3 V, TA = 25°C

SN74LVC841A

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SC AS307E - M ARCH 1 993 - R EVISED JU N E 1997 • EPIC Enhanced-Performance Implanted CMOS Submicron Process • Typical V q l p (Output Ground Bounce) < 0.8 V at VCc = 3.3 V, TA = 25°C

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS307J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

A115-A

Abstract: C101 SN74LVC841A
Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS307J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307H – MARCH 1993 – REVISED AUGUST 1998 D D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C

SN74LVC841

Contextual Info: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307A - MARCH 1993 - REVISED JULY 1995 DB, DW, OR PW PACKAGE TOP VIEW EPIC (Enhanced-Performance Implanted CMOS) Submicron Process Typical V o lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C

LC841A

Abstract: A115-A C101 SN74LVC841A SN74LVC841ADW
Contextual Info: SN74LVC841A 10ĆBIT BUSĆINTERFACE DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCAS307J − MARCH 1993 − REVISED AUGUST 2003 D D D D D D D D D Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 6.7 ns at 3.3 V Typical VOLP Output Ground Bounce

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307I – MARCH 1993 – REVISED AUGUST 2002 D D D D D D D D D Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 6.7 ns at 3.3 V Typical VOLP Output Ground Bounce

SN74LVC841

Contextual Info: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307A – MARCH 1993 – REVISED JULY 1995 D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C

SN74LVC841

Contextual Info: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307B – MARCH 1993 – REVISED MAY 1996 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS307J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

BIT 3195 G

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307G – MARCH 1993 – REVISED JUNE 1998 D EPIC Enhanced-Performance Implanted D D D D D D D DB, DW, OR PW PACKAGE (TOP VIEW CMOS) Submicron Process Typical VOLP (Output Ground Bounce)

SN74LVCS41A

Contextual Info: ^ • • • • • • • • ^ SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS _ ^ EPICrM Enhanced-Performance Implanted CMOS Submicron Process Typical Vqlp (Output Ground Bounce) < 0.8 V at Vcc « 3.3 V, TA = 25°C

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS307J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

SN74LVC841A

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS S C A S 307F - M ARCH 1993 - R EVISED JA N U A R Y 1998 D EPIC Enhanced-Performance Implanted DB, DW, OR PW PACKAGE (TOP VIEW CMOS) Subm icron Process D Typical Vqlp (Output Ground Bounce)

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307J – MARCH 1993 – REVISED AUGUST 2003 D D D D D D D D D Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 6.7 ns at 3.3 V Typical VOLP Output Ground Bounce

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS307J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS307J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS307J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

SN74LVC841A

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307H – MARCH 1993 – REVISED AUGUST 1998 D D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307H – MARCH 1993 – REVISED AUGUST 1998 D D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN74LVC841A 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS307J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V