SN74LV10A Search Results

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

A115-A

Abstract: C101 SN54LV10A SN74LV10A
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

LV10A

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

A115-A

Abstract: C101 SN54LV10A SN74LV10A
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

A115-A

Abstract: C101 SN54LV10A SN74LV10A
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

A115-A

Abstract: C101 SN54LV10A SN74LV10A
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

SN54LV10A

Abstract: SN74LV10A SN74LV10AD SN74LV10ADBR SN74LV10ADR SN74LV10ANSR SN74LV10APW SN74LV10APWR SN74LV10APWT
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338C – SEPTEMBER 2000 – REVISED JULY 2003 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 7 ns at 5 V Typical VOLP (Output Ground Bounce)

A115-A

Abstract: C101 SN54LV10A SN74LV10A
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

A115-A

Abstract: C101 SN54LV10A SN74LV10A
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C

5555 FAIRCHILD optocoupler

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Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
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Contextual Info: Logic Cross-Reference Introduction This Logic Cross-Reference for Buyers, Distribution Specialists and others with an interest in Logic will assist in finding a device made by Texas Instruments that is identical or similar to many of our competitors’ Logic products.

PLL WITH VCO 4046 appli note philips

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74LS series logic gates 3 input or gate

Abstract: sn74 series TTL logic gates list 4017 counter IC datasheet data sheet ic 4017 IC CD 4033 pin configuration CMOS Data Book Texas Instruments Incorporated 74LS series logic gates hp 4514 TEXAS INSTRUMENTS SN7400 SERIES ic 4026 down counter
Contextual Info: LOGIC OVERVIEW 1 FOCUS ON THE IDEAL LITTLE LOGIC SOLUTION 2 FUNCTIONAL INDEX 3 FUNCTIONAL CROSSĆREFERENCE 4 DEVICE SELECTION GUIDE 5 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE FIRST HALF 2002 IMPORTANT NOTICE