SN74LV10APWT Search Results

SN74LV10APWT Datasheets (8)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
SN74LV10APWT		Texas Instruments	Vcc to GND: -0.5 to 7V input voltage: -0.5 to 7V input clamp current: -20mA triple 3-input positive-NAND gate	Original	PDF	261.68KB	11
SN74LV10APWT		Texas Instruments	Triple 3-Input Positive-NAND Gate 14-TSSOP -40 to 85	Original	PDF	508.17KB	15
SN74LV10APWT		Texas Instruments	SN74LV10 - IC LV/LV-A/LVX/H SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, TSSOP-14, Gate	Original	PDF	939.58KB	16
SN74LV10APWTE4		Texas Instruments	Triple 3-Input Positive-NAND Gate 14-TSSOP -40 to 85	Original	PDF	508.17KB	15
SN74LV10APWTE4		Texas Instruments	Triple 3-Input Positive-NAND Gate	Original	PDF	261.67KB	11
SN74LV10APWTE4		Texas Instruments	SN74LV10 - IC LV/LV-A/LVX/H SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, TSSOP-14, Gate	Original	PDF	939.58KB	16
SN74LV10APWTG4		Texas Instruments	Triple 3-Input Positive-NAND Gate 14-TSSOP -40 to 85	Original	PDF	508.17KB	15
SN74LV10APWTG4		Texas Instruments	SN74LV10 - IC LV/LV-A/LVX/H SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, TSSOP-14, Gate	Original	PDF	939.58KB	16

SN74LV10APWT Price and Stock

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Texas Instruments SN74LV10APWT IC GATE NAND 3CH 3-INP 14TSSOP
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DigiKey	SN74LV10APWT	Reel			1,250	1 - 10 - 100 - 1000 - 10000 $0.30	Buy Now
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Texas Instruments SN74LV10APWTE4 Peripheral ICs
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Vyrian	SN74LV10APWTE4		1,543			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Texas Instruments SN74LV10APWTG4 Peripheral ICs
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Vyrian	SN74LV10APWTG4		568			1 - 10 - 100 - 1000 - 10000 -	Get Quote

SN74LV10APWT Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A	PDF
A115-A Abstract: C101 SN54LV10A SN74LV10A Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A A115-A C101 SN54LV10A SN74LV10A	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A	PDF
A115-A Abstract: C101 SN54LV10A SN74LV10A Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A A115-A C101 SN54LV10A SN74LV10A	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A	PDF
A115-A Abstract: C101 SN54LV10A SN74LV10A Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A A115-A C101 SN54LV10A SN74LV10A	PDF
Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP (Output Ground Bounce)	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A	PDF
SN54LV10A Abstract: SN74LV10A SN74LV10AD SN74LV10ADBR SN74LV10ADR SN74LV10ANSR SN74LV10APW SN74LV10APWR SN74LV10APWT Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338C – SEPTEMBER 2000 – REVISED JULY 2003 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 7 ns at 5 V Typical VOLP (Output Ground Bounce)	Original	SN54LV10A, SN74LV10A SCES338C SN54LV10A 000-V A114-A) A115-A) SN54LV10A SN74LV10A SN74LV10AD SN74LV10ADBR SN74LV10ADR SN74LV10ANSR SN74LV10APW SN74LV10APWR SN74LV10APWT	PDF
A115-A Abstract: C101 SN54LV10A SN74LV10A Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A A115-A C101 SN54LV10A SN74LV10A	PDF

Contextual Info: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A	PDF