SN74LV Search Results

Contextual Info: SN74LVTH18502AĆEP, SN74LVTH182502AĆEP 3.3ĆV ABT SCAN TEST DEVICES WITH 18ĆBIT UNIVERSAL BUS TRANSCEIVERS SCAS744A − DECEMBER 2003 − REVISED JUNE 2004 D Controlled Baseline D D D D D D D D UBT  Universal Bus Transceiver − One Assembly/Test Site, One Fabrication

Contextual Info: SN54LVC07A, SN74LVC07A HEX BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS www.ti.com SCAS595O – OCTOBER 1997 – REVISED JULY 2005 FEATURES • • Operate From 1.65 V to 5 V Inputs and Open-Drain Outputs Accept Voltages up to 5.5 V 2 13 3 12 4 5 6 7 11 10 9 8

Contextual Info: SN54LV164A, SN74LV164A 8ĆBIT PARALLELĆOUT SERIAL SHIFT REGISTERS SCLS403H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 5 11 10 9 6 8 7 VCC QH QG QF QE

Contextual Info: SN74LVC1G66ĆQ1 SINGLE BILATERAL ANALOG SWITCH SCES499C − OCTOBER 2003 − REVISED APRIL 2005 D Qualification in Accordance With D D D D D D D High Speed, Typically 0.5 ns AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

Contextual Info: SN54LV574A, SN74LV574A OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS412I − APRIL 1998 − REVISED APRIL 2005 20 2 19 3 18 4 5 17 16 6 15 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK 1D 2D 3D 4D 5D 6D 7D 8D 1 20 19 1Q 18 2Q

Contextual Info: SN74LV373AT OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES630B – JULY 2005 – REVISED AUGUST 2005 FEATURES • • Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22

Contextual Info: SN74LVC541A-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS748A – DECEMBER 2003 – REVISED AUGUST 2005 • FEATURES • • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C

Contextual Info: SN74LVC3G06 TRIPLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS www.ti.com SCES364G – AUGUST 2001 – REVISED MAY 2005 FEATURES • • • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN54LVTH16245A, SN74LVTH16245A 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS143Q – MAY 1992 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • Members of the Texas Instruments Widebus Family State-of-the-Art Advanced BiCMOS

1a1472

Contextual Info: SN74LVCR162245 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES047E – AUGUST 1995 – REVISED MARCH 2005 FEATURES • • • • • • • • • • DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Operates From 2.7 V to 3.6 V

Contextual Info: SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES SCLS427I − APRIL 1999 − REVISED APRIL 2005 1A 1B 2B 2A 2C 3C GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 4C 4A 4B 3B 3A SN74LV4066A . . . RGY PACKAGE TOP VIEW description/ordering information

Contextual Info: SN74LVC2G14 DUAL SCHMITT-TRIGGER INVERTER www.ti.com SCES200J – APRIL 1999 – REVISED JUNE 2005 FEATURES • • • • • • • • • • • DBV OR DCK PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages Supports 5-V VCC Operation

Contextual Info: SN74LVC1G17 SINGLE SCHMITTĆTRIGGER BUFFER SCES351N − JUNE 2001 − REVISED OCTOBER 2005 D Available in the Texas Instruments D D D D D ±24-mA Output Drive at 3.3 V D Ioff Supports Partial-Power-Down Mode NanoStar and NanoFree Packages Supports 5-V VCC Operation

LVC161284

Contextual Info: SN74LVC161284 19ĆBIT BUS INTERFACE SCAS583J − NOVEMBER 1996 − REVISED FEBRUARY 2005 D 1.4-kΩ Pullup Resistors Integrated on All D D D D Open-Drain Outputs Eliminate the Need for Discrete Resistors ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: SN74LVC1G34 SINGLE BUFFER GATE www.ti.com SCES519F – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V

Contextual Info: SN54LVTH18652A, SN54LVTH182652A, SN74LVTH18652A, SN74LVTH182652A 3.3-V ABT SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS SCBS312C – MARCH 1994 – REVISED JUNE 1997 D D D D D D D D Members of the Texas Instruments SCOPE  Family of Testability Products

SN74LVTH32373-EP

Contextual Info: SN74LVTH32373ĆEP 3.3ĆV ABT 32ĆBIT TRANSPARENT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCBS794 − DECEMBER 2003 D Controlled Baseline D D D D D D Typical VOLP Output Ground Bounce − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing

74LV245A

Contextual Info: SN74LV245AT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCLS605B – DECEMBER 2004 – REVISED AUGUST 2005 FEATURES • • Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22

Contextual Info: SN74LVC245A-EP OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS741B – DECEMBER 2003 – REVISED AUGUST 2005 FEATURES • • • • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing

Contextual Info: SN74LVC16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS755A – DECEMBER 2003 – REVISED SEPTEMBER 2005 FEATURES • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

CCA MTBF

Abstract: 8T245
Contextual Info: SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A – JUNE 2005 – REVISED AUGUST 2005 FEATURES • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22

Contextual Info: SN74LVC07AĆEP HEX BUFFERS/DRIVERS WITH OPENĆDRAIN OUTPUTS SCAS738A − DECEMBER 2003 − REVISED MAY 2004 D Controlled Baseline D D D D D Inputs and Open-Drain Outputs Accept − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing

Contextual Info: SN74LVT240A 3.3ĆV ABT OCTAL BUFFER/DRIVER WITH 3ĆSTATE OUTPUTS SCBS134K − SEPTEMBER 1992 − REVISED JANUARY 2004 D Supports Mixed-Mode Signal Operation D D D D D DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW (5-V Input and Output Voltages With 3.3-V VCC )

Contextual Info: SN74LVC74A-EP DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS751A – DECEMBER 2003 – REVISED AUGUST 2005 FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication