AB14
Abstract: MCM64E836 MPC7400 MPC7450
Contextual Info: Advance Information MPC7450EC/D Rev. 4, 11/2001 MPC7450 RISC Microprocessor Hardware Specifications The MPC7450 is a reduced instruction set computing RISC microprocessor that implements the PowerPC instruction set architecture. This document describes pertinent electrical and
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7x clock multiplier
Abstract: dc m9 footprint Motorola 581 XPC header 7451 pin configuration ci 7451 ic 7451 pin diagram ic 825 DNA Loctite 412 motorola g18
Contextual Info: Advance Information MPC7451EC/D Rev. 0.1, 11/2001 MPC7451 RISC Microprocessor Hardware Specifications The MPC7451 is a reduced instruction set computing RISC microprocessor that implements the PowerPC instruction set architecture. This document describes pertinent electrical and
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embedded powerpc 460
Abstract: ES100 xls
Contextual Info: Advance Information MPC7451EC/D Rev. 0.1, 11/2001 MPC7451 RISC Microprocessor Hardware Specifications The MPC7451 is a reduced instruction set computing RISC microprocessor that implements the PowerPC instruction set architecture. This document describes pertinent electrical and
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F2K3
Abstract: Pilz K12224 S-99 S1SW P auxiliary
Contextual Info: Electronic monitoring relays PMDsrange Standstill monitoring S1SW P Unit features ` Standstill monitoring with and without rundown time ` Standstill threshold can be set ` Run-down monitoring time can be set ` Normally de-energised mode ` Measuring circuits are galvanically
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nsg-d-2-278-2009-09f2k3pilzk12224+3s-99s1sw pauxiliary
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C6201-200
Contextual Info: TMX320C6201 DIGITAL SIGNAL PROCESSOR SPRS051C - JANUARY 1997 - REVISED MARCH 1998 • • Instruction Set Features - Byte-Addressable 8-, 16-, 32-Bit Data - 32-Bit Address Range - 8-Bit Overflow Protection - Saturation - Bit-Field Extract, Set, Clear - Bit Counting
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7 segment display LT 542
Abstract: LT 542 seven segment display data sheet 8086 instruction set 8086 opcode table for 8086 microprocessor 8086 opcode machine code BTS 308 rcl 3702 7 SEGMENT DISPLAY LT 543 intel 8086 Intel Microprocessor Data Book 240440
Contextual Info: Intel Architecture Software Developer’s Manual Volume 2: Instruction Set Reference NOTE: The Intel Architecture Software Developer’s Manual consists of three volumes: Basic Architecture, Order Number 243190; Instruction Set Reference, Order Number 243191; and the System Programming Guide,
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7 segment display lt 542lt 542 seven segment display data sheet8086 instruction set8086 opcode table for 8086 microprocessor+68086 opcode machine codebts 308rcl 37027 segment display lt 543intel 8086intel microprocessor data book 240440
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pm c20 u060
Abstract: PWM theory SPRU161A pic spwm CNC DRIVES TMS320F240 SPRU160 237 521 02 dsp cnc controller programing dsp with c for inverters
Contextual Info: TMS320C24x DSP Controllers Peripheral Library and Specific Devices Reference Set Volume 2 1997 Digital Signal Processing Solutions Printed in U.S.A., March 1997 D412016-9761 revision A SPRU161A Reference Set Volume 2 TMS320C24x DSP Controllers Peripheral Library and Specific Devices
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mx 362-0
Abstract: EL 817 c221 mx c346 diode MX C322 MX C339 DSA25 ram 6164 mv silicon c320 6164 ram EL 817 c336
Contextual Info: INTEGRATED CIRCUITS DATA SHEET PCF8832 STN RGB - 384 output column driver Preliminary specification 2002 Aug 16 Philips Semiconductors Preliminary specification STN RGB - 384 output column driver CONTENTS PCF8832 8.2 8.3 8.4 8.5 8.6 Set Y-address Set X-address
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7x clock multiplier
Abstract: MCM64E836 MPC7400 MPC7450 MPC7451
Contextual Info: Freescale Semiconductor, Inc. Advance Information MPC7451EC/D Rev. 0.1, 11/2001 Freescale Semiconductor, Inc. MPC7451 RISC Microprocessor Hardware Specifications The MPC7451 is a reduced instruction set computing RISC microprocessor that implements the PowerPC instruction set architecture. This document describes pertinent electrical and
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7 segment display LT 542
Abstract: BTS 308 LT 542 seven segment display data sheet 8086 instruction set MP 3389 EF addressing modes 8086 rcl 3702 CPU Intel Celeron D 347 TSS 507 intel 8086
Contextual Info: IA-32 Intel Architecture Software Developer’s Manual Volume 2: Instruction Set Reference NOTE: The IA-32 Intel Architecture Software Developer’s Manual consists of three volumes: Basic Architecture, Order Number 245470; Instruction Set Reference, Order Number 245471; and the System
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IBM powerPC schematics 750
Abstract: IBM39STB
Contextual Info: IBM39STB032xx IBM39STB034xx Preliminary STB032xx and STB034xx Digital Set-Top Box Integrated Controllers Features Overall • High-End Set-Top Box technology • Four major subsystems integrated with IBM on-chip CoreConnect structure. • Maximum MIPS for OS and application tasks
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AB14
Abstract: MCM64E836 MPC7400 MPC7450 smi 5502
Contextual Info: Freescale Semiconductor, Inc. Advance Information MPC7450EC/D Rev. 4, 11/2001 Freescale Semiconductor, Inc. MPC7450 RISC Microprocessor Hardware Specifications The MPC7450 is a reduced instruction set computing RISC microprocessor that implements the PowerPC instruction set architecture. This document describes pertinent electrical and
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IBM39 powerpc
Abstract: IBM39 IBM powerpc 405 16550 atsc nim DVB smart card SA-12E schematic set top box set top box dvb STB03xxx
Contextual Info: IBM39STB032xx IBM39STB034xx Preliminary STB032xx and STB034xx Digital Set-Top Box Integrated Controllers Features Overall • High-End Set-Top Box technology • Four major subsystems integrated with IBM on-chip CoreConnect structure. • Maximum MIPS for OS and application tasks
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chip yx 801
Abstract: yx 801 4 pin Bipolar Integrated Technology "Bipolar Integrated Technology" TMS 3880 zr 4.7 B2110 B2110-70 B2120 B2120-30
Contextual Info: BU I /CSb, Prelim inary _ B2110/B2120 TTL Floating Point Chip Set • FEATURES ■ Complete floating point and integer processor chip set supports the ANSI/IEEE STD. 754 and DEC F&G formats. ■ Four data formats 64-bit floating point
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IBM39STB02100
Abstract: DSA0029232 IBM39 401B3 MUX21 real-time decoding IBM39STB I2C TRACE MUX23 ibm39stb02100pba22c
Contextual Info: IBM39STB0210x Advance STB0210x Digital Set-Top Box Integrated Controllers Features Overall • IBM Set-Top Box technology • Four major subsystems integrated with IBM onchip CoreConnect structure. • Maximum MIPS for OS and application tasks • Simplified driver and software development
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IBM39 powerpc
Abstract: STB0210x 16550D IBM39 schematic set top box STB03xxx STB02101 BT33 set top box dac circuit STB0210
Contextual Info: IBM39STB0210x Advance STB0210x Digital Set-Top Box Integrated Controllers Features Overall • IBM Set-Top Box technology • Four major subsystems integrated with IBM onchip CoreConnect structure. • Maximum MIPS for OS and application tasks • Simplified driver and software development
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cmo 765
Abstract: ras215 MAR8 C4000 C8000 D4000 DC000 EL2010 TD10 microchannel
Contextual Info: Ê O S u a Advance Information EL2010 MICRO CHANNEL MEMORY BOARD CHIPSET - COMPLETE MICRO CHANNEL MEMORY CARD IN 2 CHIP SET - UP TO 16 MEGABYTES OF MEMORY - FULL SET OF MICRO CHANNEL POS REGISTERS - COMPLETE TRAM TRANSLATION RAM SUPPORT - MEMORY FULLY SOFTWARE RELOCATABLE
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IEEE754
Abstract: MIPS64 R5000
Contextual Info: TX9956CXBG Preliminary TOSHIBA RISC PROCESSOR TX9956CXBG-533/-600 TX9956C (64-bit RISC MICROPROCESSOR) 1. GENERAL DESCRIPTION The TX9956C is a 64-bit RISC (Reduced Instruction Set Computer) microprocessor that is a low-cost, low-power microprocessor developed for interactive consumer applications including set-top terminals,
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Contextual Info: ADSP-8110/ADSP-3120 ADSP-7110/ADSP-7120 ANALOG ► DEVICES Floating Point Chip Set April, 1987 I FEATURES • Complete floating point and integer processor chip set supports the ANSI/IEEE STD.754and DEC F&G formats ■ Four data formats 64-bit floating point
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B2110A
Abstract: B3110-70 INF 740 CK21 "Bipolar Integrated Technology" B3110 B2120 B3120 yg 2025
Contextual Info: B3110/B3120 B2110/B2120 Bipolar Integrated Technology, Inc. Floating Point Chip Set IFEA T U R E S • Complete floating point and integer processor chip set supports the ANSI/IEEE STD.754 and D EC F&G formats. ■ Four data formats 64-bit floating point
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intel xmm 6140
Abstract: DQ45CB 43LA xmm 6140 81348 61RA 100C AA10 PAR64 PC3200
Contextual Info: Intel 81348 I/O Processor Datasheet Product Features Two Integrated Intel XScale processors — 667 MHz, 800 MHz and 1.2 GHz — ARM* V5TE Compliant — Instruction/Data Cache: 32 KByte, 4-way Set Associative, NRU Replacement Algorithm, Lockable — Unified Level 2 Cache: 512 KByte Set
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81348
Abstract: 3150* intel
Contextual Info: Intel 81348 I/O Processor Datasheet Product Features Two Integrated Intel XScale processors — 667 MHz, 800 MHz and 1.2 GHz — ARM* V5TE Compliant — Instruction/Data Cache: 32 KByte, 4-way Set Associative, NRU Replacement Algorithm, Lockable — Unified Level 2 Cache: 512 KByte Set
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Contextual Info: Intel 80333 I/O Processor Datasheet Product Features • ■ ■ ■ ■ ■ ■ Integrated Intel XScale® core — 500, 667 and 800 MHz — ARM* V5TE Compliant — 32 KByte, 32-way Set Associative Instruction Cache with cache locking — 32 KByte, 32-way Set Associative Data
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B1210
Abstract: DDR333 M66EN PAR64 PC2700 REQ64
Contextual Info: Intel 80331 I/O Processor Datasheet Product Features • ■ ■ ■ ■ ■ ■ Integrated Intel XScale® core — 500, 667 and 800 MHz — ARM* V5TE Compliant — 32 KByte, 32-way Set Associative Instruction Cache with cache locking — 32 KByte, 32-way Set Associative Data
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