SCAS337 Search Results

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS337C – FEBRUARY 1993 – REVISED OCTOBER 1998 D D D D D D Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC Distributes One Clock Input to Twelve

Contextual Info: CDC2586 www.ti.com SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS • FEATURES • • • • • • Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC

Level-4-260C-72

Contextual Info: CDC2586 www.ti.com SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS • FEATURES • • • • • • Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC

CDC2586

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS337B – FEBRUARY 1993 – REVISED NOVEMBER 1995 D D D D D D Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC Distributes One Clock Input to Twelve

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _ SCAS337 - FEBRUARY 1993 - REVISED MARCH 1994 * Edge-Triggered Clear for Half-Frequency Outputs * TTL-Compatible Inputs and Outputs * Outputs Have Internal 26-Q Series Resistors to Dampen Transmission Line

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS337C – FEBRUARY 1993 – REVISED OCTOBER 1998 D D D D D D Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC Distributes One Clock Input to Twelve

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS337B - FEBRUARY 1993 - REVISED NOVEMBER 1995 L o w O u t p u t S k e w f or C l o c k - D i s t r i b u t i o n A p p l i c a t i o n f or S y n c h r o n o u s D R A M , and C lo c k -G e n e ra tio n Ap p li ca tio n s

Contextual Info: CDC2586 www.ti.com SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS • FEATURES • • • • • • Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC

Contextual Info: CDC2586 www.ti.com SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS • FEATURES • • • • • • Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC

Contextual Info: CDC2586 www.ti.com SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS • FEATURES • • • • • • Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC

CDC2586

Abstract: MS-026
Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS337C – FEBRUARY 1993 – REVISED OCTOBER 1998 D D D D D D Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC Distributes One Clock Input to Twelve

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS337-FEBRUARY 1993 - REVISED MARCH 1994 Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V Vcc Distributes One Clock Input to Twelve Outputs Two Select Inputs Configure Up to Nine

Contextual Info: CDC2586 www.ti.com SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS • FEATURES • • • • • • Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC

CDC2586

Contextual Info: CDC2586 www.ti.com SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS • FEATURES • • • • • • Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC

CDC2586

Abstract: CDC2586PAH CDC2586PAHG4 CDC2586PAHR CDC2586PAHRG4 MS-026
Contextual Info: CDC2586 www.ti.com SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS • FEATURES • • • • • • Low Output Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS337B- FEBRUARY 1 9 9 3 - REVISED NOVEMBER 1996 * f • • • • • • Low Output Skew for Clock-Dlstrlbutlon and Clock-Generation Applications Operates at 3.3-V Vqc Distributes One Clock Input to IWelve

CDC2586

Abstract: CDC586
Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SC A S 337- FEBRUARY 1993 - REVISED MARCH 1994 Edge-Triggered Clear for Half-Frequency Outputs TTL-Compatible Inputs and Outputs Outputs Have Internal 26-Q Series Resistors to Dampen Transmission Line

scta027

Abstract: SDRAM 1994 Texas Instruments 1992 16 MB SDRAM Texas Instruments CDC2586 LVC244 LVTH182504A TMS626802 Buffered SDRAM DIMM
Contextual Info: Design-For-Test Analysis of a Buffered SDRAM DIMM Sri Jandhyala and Adam Ley Semiconductor Group SCTA027 Reprinted with permission from Proceedings of International Workshop on Memory Technology, Design and Testing, Singapore, August 13–14, 1996.  1996 IEEE

SN74ALVCH162245

Abstract: Schottky Barrier Diode Bus-Termination Array SN7400 CLOCKED SLLS210 SCAD001D TEXAS INSTRUMENTS SN7400 SERIES buffer SN74LVCC4245 sn74154 SDAD001C SN7497
Contextual Info: Section 4 Logic Selection Guide ABT – Advanced BiCMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 ABTE/ETL – Advanced BiCMOS Technology/ Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9

1992 16 MB SDRAM Texas Instruments

Abstract: CDC2586 LVC244 LVTH182504A TMS626802 dram memory module 1993 SDRAM 1994 Texas Instruments SCTD002 Buffered SDRAM DIMM
Contextual Info: Design-For-Test Analysis of a Buffered SDRAM DIMM Sri Jandhyala and Adam Ley SCTA027 Reprinted with permission from Proceedings of International Workshop on Memory Technology, Design and Testing, Singapore, August 13–14, 1996.  1996 IEEE 1 IMPORTANT NOTICE

SN74HC02 Spice model

Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
Contextual Info: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest

Contextual Info: CDC2586 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS337B - FEBRU A RY 1993 - REV ISED NO VEM BER 1995 * Low Output Skew for Clock-Dlstrlbutlon and Clock-Generatlon Applications Operates at 3.3-V Vqc Distributes One Clock input to Twelve