S7C4096 Search Results

Contextual Info: H i g h Pe rf o rm a n c e A S7C4096 A S7 C 34 096 512Kx8 CMOS SRAM A 5 1 2 K x 8 CMOS SRAM Preliminary information Features Easy memory expansion with CE, OE inputs TTL-compatible, three-state I/O 36-pin JEDEC standard package - 400 mil SOJ Center power and ground pins for low noise

X27C4

Abstract: MX27C4096DC-12 MX27C4096DC 27c4100
Contextual Info: [P ^E L D M O liM ß W M X IC M X27C 4100/27C4096 4IN/I-BITI51SK x 8 /2 5 B K x 1 B CMOS EPROM FEATURES • 256K x 16 organization MX27C4096, JEDEC pin out) • 512K x 8 or 256K x 16 organization(MX27C4100, ROM pin out compatible) • +12.5V programming voltage

Contextual Info: H i 11 P e r f o r m , ! in r « \S7C409fi s l l K x K H \ S 7 C > 4 I y 6 C M O S SK A M A S I 7 k X 8 C M O S S H A M Preliminary information - 1 2 /1 5 / 2 0 / 2 5 n s ad d ress access tim e •Easy m e m o ry e x p a n s io n w ith CE, OE in p u ts ■T T L -co m p atib le, th re e -s ta te I / O

Contextual Info: Features • O rganization: 5 2 4 ,2 8 8 w o rd s x 8 bits • H igh speed - 1 2/1 S /2 0 /2 S ns address access tim e - 5 / 5 / 6 / 7 ns o u tp u t enable access tim e • l o w p o w er consum ption - Active: 990 m W m ax 20 ns cycle, 5V - Standby: 5 5 m W m ax (CMOS inputs)

AS7C34096

Abstract: AS7C34096-10 AS7C34096-12 AS7C34096-15 AS7C34096-20 AS7C4096 AS7C4096-12 AS7C4096-15 AS7C4096-20 as7c4096-15ji
Contextual Info: 3 0 0 S"7 9 3 ’T *»,i>*gg VOCTpBERn999•" «" *. . S U „-. S7C4096 ?AS7C34096 ï . ■-"jv* •r~ . - a* z BSjfe i ’i t ' i . ■ T '?* r^ * J‘ F' ’ * 1 ^' r 5V/3.’3V4512KX&CM0S SRAM •-' ^ ïV - ' Features S7C4096 5V version A S7C 34096 (3.3V version)