AS7C409 Search Results

AS7C4096-15JI

Abstract: AS7C34096 AS7C4096 AS7C34096-12TI
Contextual Info: October 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

AS7C34098

Abstract: AS7C4098
Contextual Info: January 2001 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature

AS7C31026

Abstract: AS7C34098 AS7C3513 AS7C4098 7c34098-12
Contextual Info: AS7C4098 AS7C34098 5V/3.3V 256Kx16 CMOS SRAM Features • Easy memory expansion with CE, OE inputs • TTL- and CMOS-compatible, three-state I/ • 44-pin JEDEC standard packages - 400 mil SOJ - 400 mil TSOP II • Center power and ground pins for low noise

7C34098-20

Abstract: AS7C34098 AS7C4098
Contextual Info: High Performance 256Kx16 CMOS SRAM AS7C4098 AS7C34098 256K×16 CMOS SRAM Preliminary information Features • Organization: 262,144 words × 16 bits • High speed - 15/20/25/35 ns address access time - 8/10/12/15 ns output enable access time • Low power consumption

4342414

Abstract: AS7C3409 AS7C34098 AS7C4098
Contextual Info: AS7C4098 AS7C34098 March 2002 5V/3.3V 256K x 16 CMOS SRAM Features • AS7C4098 5V version • AS7C34098 (3.3V version) • Industrial and commercial temperature • Organization: 262,144 words × 16 bits • Center power and ground pins • High speed

AS7C4096A

Abstract: AS7C4096A-20JI AS7C4096A-20TI AS7C4096 AS7C4096A-10JC AS7C4096A-10JI AS7C4096A-10TC AS7C4096A-10TI AS7C4096A-12JC AS7C4096A-12JI
Contextual Info: February 2006 AS7C4096A 5.0V 512K x 8 CMOS SRAM • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages Features • Pin compatible to AS7C4096 • Industrial and commercial temperature

Contextual Info: AS7C4096 AS7C34096 A 5V/3.3V 512Kx8 CMOS SRAM Features • Organization: 262,144 words x 16 bits • High speed - 12/15/ 20/ 25 ns address access time - 5/ 5/ 617 ns output enable access time • Law power consumption - .Active: 990 mW max 20 ns cycle, 5V

AS7C34098

Abstract: AS7C4098
Contextual Info: June 2000 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature

AS7C34098

Abstract: AS7C4098
Contextual Info: AS7C4098 AS7C34098 March 2002 5V/3.3V 256K x 16 CMOS SRAM Features • AS7C4098 5V version • AS7C34098 (3.3V version) • Industrial and commercial temperature • Organization: 262,144 words × 16 bits • Center power and ground pins • High speed

Contextual Info:  $6& $6& 99.ð&02665$0 HDWXUHV • TTL-compatible, three-state I/O • 44-pin JEDEC standard package - 400 mil SOJ - 400 mil TSOP II • Upward compatibility - 64Kx16 AS7C1026) - 256K×16 (AS7C4098) • Center power and ground pins

as7c4096a-15jc

Contextual Info: November 2004 Preliminary AS7C4096A 5.0V 512K x 8 CMOS SRAM • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages Features • Pin compatible to AS7C4096 • Industrial and commercial temperature

AS7C4096-20JI

Abstract: AS7C34096-12TI
Contextual Info: January 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins • High speed

4342414

Abstract: AS7C34098 AS7C4098
Contextual Info: March 2001 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature

AS7C34096

Abstract: AS7C4096 AS7C4096-20JI AS7C34096-12TI
Contextual Info: March 2002 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

7C4096

Abstract: AS7C34096 AS7C4096 5hbs AA344
Contextual Info: H igh Perform ance S12KX8 CMOS SRAM AS7C4096 A S7C 34096 1 5 1 2 K X 8 C M O S SR A M P relim inary inform ation SRAM Features • O rg a n iz a tio n : 5 2 4 ,2 8 8 w o rd s x 8 bits • H ig h sp e ed Easy m e m o ry e x p a n s io n w ith CE, OE in p u ts

AS7C4096-12TC

Abstract: AS7C4096-20JI AS7C34096-12TI
Contextual Info: December 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

Contextual Info: September 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

AS7C34098-15TC

Abstract: as7c4098-20ti AS7C34098 AS7C4098
Contextual Info: AS7C4098 AS7C34098 January 2005 5V/3.3V 256K x 16 CMOS SRAM Features • AS7C4098 5V version • AS7C34098 (3.3V version) • Industrial and commercial temperature • Organization: 262,144 words × 16 bits • Center power and ground pins • High speed

AS7C4096

Abstract: AS7C4096A AS7C4096A-10JC AS7C4096A-10JI AS7C4096A-10TC AS7C4096A-10TI AS7C4096A-12JC AS7C4096A-12JI AS7C4096A-12TC
Contextual Info: May 2005 Preliminary AS7C4096A 5.0V 512K x 8 CMOS SRAM • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages Features • Pin compatible to AS7C4096 • Industrial and commercial temperature

AS7C34098

Abstract: AS7C4098 cmos4098
Contextual Info: May 2001 AS7C4098 AS7C34098 5V/3.3V 256K x 16 CMOS SRAM • Low power consumption: STANDBY Features - 110 mW AS7C4098 /max CMOS - 72 mW (AS7C34098)/max CMOS • AS7C4098 (5V version) • AS7C34098 (3.3V version) • Industrial and commercial temperature

Contextual Info: H igh Perform ance 512K X8 CMOS SRAM n II AS7C4096 A S7C 34096 5 1 2 K X 8 C M O S SR A M Preliminary information 1 E asy m e m o r y e x p a n s io n w i t h CE, O E i n p u ts Logic block diagram Pin arrangement SRAM Features • Organization: 524,288 words x 8 bits

Contextual Info: H igh P e r fo r m a n c e •■ AS7C4096 AS7C34096 A 512KX8 H CM O S SRAM 5 I 2 K X 8 C M O S SR A M Features • O rgan ization : 5 2 4 ,2 8 8 w o rd s x 8 bits • 3 6 -p in JEDEC stan dard pack ages • H igh speed - 4 0 0 m il T SO P II - 5 / S / 6 / 7 n s o u tp u t enable access tim e

AS7C34096-25JC

Contextual Info: AS7C4096 AS7C34096 5V/3.3V 512Kx8 CMOS SRAM Features • Organization: 524,288 w ords x 8 bits • High speed - 1 2 /1 5 /2 0 /2 5 ns address access time - 5 / 5 / 6 / 7 ns output enable access time • Low power consumption - Active: 990 m W max 20 ns cycle, 5V

Contextual Info: AS7C4098 AS7C34098 5Y/3.3Y 256Kxl6 CMOS SRAM Features • Organization: 262,144 words x 16 bits • Available in 3.3Y AS7C34098 and 5Y (AS7C34098) versions • High speed - 10/12/15/20/25 ns address access time - 4/4/5/5/6/7 ns output enable access time