RASCO Search Results

RASCO

Abstract: rasco PLUS m rasco 1 K1100F 20MHz 4PIN RASCO model G
Contextual Info: RASCO PLUS Series 5V Crystal Clock Oscillators Œ 4-pin Package, Compatible with 14-pin DIL Œ 1.25MHz to 20MHz Frequency Range Œ TTL/CMOS Compatible Tight Symmetry 45/55% Available Œ Tri-State Option Available Œ ±100ppm Stability Standard Tighter Stabilities Available

rasco PLUS m

Abstract: RASCO Champion Technologies RASCO PLUS crystal oscillator rasco a pin rasco 1 motorola K1144AA K1519 K1149 K1523 80386 12.5 MHz
Contextual Info: CHAMPION TECHNOLOGIES I SIE D RASCO PLUS Crystal Clock Oscillators • 1.25 to 50 MHz Frequency Range • TTL/CMOS Compatibility Standard from 1.25 MHz to 20 MHz • 3,000g Shock Rating • Low Current Drain • Drives Motorola 68020, 68030, Intel 80386 and Other High Speed Micropro­

AN1328

Abstract: ST24C04 ST52 ST52X430 MICRO ST52
Contextual Info: AN1328 APPLICATION NOTE I2C COMMUNICATION PROTOCOL WRITTEN IN FUZZYSTUDIO 4.0 FOR ST52X430 Author: G. Rascona’ 1. INTRODUCTION In this application note we implement two routines to read/write one single byte of data at a time from/into an EEPROM memory in this case the ST24x04 using ST52x430 microcontroller. The protocol used to

ST52x301

Abstract: NTC resistor T5 digital micro mirror device VB408 AN1147 NTC SENSOR CONNECTION FUZZYSTUDIO 3.0
Contextual Info:  AN1147 APPLICATION NOTE High Resolution Digital Conversion of an NTC by ST52x301 Authors: A. Cucuccio, G. Rascona’ 1. Introduction In this application note is presented an efficient and flexible method to evaluate the value of a variable resistor in the range 1KΩ ÷ 10KΩ i.e. it could be an NTC resistance for a thermal regulation control

RASCO

Abstract: rasco PLUS m rasco 1 RASCO model G
Contextual Info: RASCO PLUS Series 5V Crystal Clock Oscillators Œ 4-pin Package, Compatible with 14-pin DIL Œ 1.25MHz to 20MHz Frequency Range Œ TTL/CMOS Compatible Tight Symmetry 45/55% Available Œ Tri-State Option Available Œ ±100ppm Stability Standard Tighter Stabilities Available

Contextual Info: M O SEL V IT E L IC V53C8258L UL TRA-HIGH SPEED, 3.3 VOLT256K X 8 BIT EDO PAGE MODE CMOS DYNAMIC RAM PR&BMBBOtt HIGH PERFORMANCE 60 Max. RAS Access Time, tRAC 60 ns Max. Column Address Access Time, (t^M ) 30 ns Min. Extended Data Out Page Mode Cycle Time, (tPC)

SGMS056D

Abstract: SMJ55161 "Video RAM" SMJ55161-75
Contextual Info: SMJ55161 262144 BY 16-BIT MULTIPORT VIDEO RAM SGMS056D – MAY 1995 – REVISED OCTOBER 1997 D D D D D D D D D D D D D D D Organization: – DRAM: 262 144 by 16 Bits – SAM: 256 by 16 Bits Dual-Port Accessibility – Simultaneous and Asynchronous Access From the DRAM and

SMJ55166

Abstract: SMJ55166-75 SMJ55166-80
Contextual Info: SMJ55166 262144 BY 16-BIT MULTIPORT VIDEO RAM SGMS057C – APRIL 1995 – REVISED JUNE 1997 D D D D D D D D D Organization: – DRAM: 262 144 Words x 16 Bits – SAM: 256 Words × 16 Bits Dual-Port Accessibility – Simultaneous and Asynchronous Access From the DRAM and

driving point and transfer function

Abstract: TMS55165 TMS55166 "Video RAM" TMS55175 TMS55176 TMS571 X463
Contextual Info: TMS55165, TMS55166, TMS55175, TMS55176 262144 BY 16-BIT MULTIPORT VIDEO RAM SMVS463 – DECEMBER 1995 D D D D D D D D D D D Organization: DRAM: 262 144 Words x 16 Bits SAM: 256 Words × 16 Bits Single 5.0-V Power Supply ±10% Dual-Port Accessibility – Simultaneous and

ic ac 1501-12

Abstract: V53C664K10
Contextual Info: JUN i V 2 1982 PR ELIM IN A R Y V53C664 6 4 K x 16 B IT F A S T P A G E M O D E B YTE W RITE C M OS D YN A M IC R AM VITELIC 80/80L 10/10L Max. RAS Access Time, tRAC 80 ns 100 ns Max. Column Address Access Time, (tCAA) 45 ns 55 ns Min. Fast Page Mode Cycle Time, (tp c )

CX24108

Abstract: Conexant CX24108 CX22702 CX23880 schematic diagram receiver satellite psi connector B58 258 24c02 CX24110 Fusion 878A schematic conexant fusion 878A driver conexant broadcast decoder cx23881 19
Contextual Info: Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. w CX23880/CX23881 PCI Audio/Video Broadcast Decoder vi e Distinguishing Features Video Subsystem

Contextual Info: MOSEL-VITELIC bSE J> m M O S E L -V IT E L IC bBSBBTl ÜDD24Db 27e! « M O V I V404J232and V404J236 2M x 32 and 2M x 36 CMOS MEMORY MODULES PRELIMINARY Features Description • ■ ■ ■ ■ ■ The V404J232 memory Module is organized as 2,097,152 x 32 bits in a 72-lead single-in-line mod­

Contextual Info: M OSEL VI TEL IC P R E L IM IN A R Y V 5 3C 1 6256H 2 5 6 K x 16 F A S T P A G E M O D E C M O S D Y N A M IC R A M HIGH PERFORMANCE 30 35 40 45 50 60 Max. RAS Access Tim e, tRAC 30 ns 35 ns 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA)

V53C464

Abstract: WJ 66 scr
Contextual Info: Nf VITEUC V53C261 FAMILY HIGH PERFORMANCE LOW POWER 64KX4 MULTIPORT VIDEO MEMORY WITH FAST PAGE MODE V V53C261 10 12 Max. RAS Access Time, tRAC 100 ns 120 ns Max Column Address Time, (trA A ) 45 ns 55 ns HIGH PERFORMANCE V53C261 Min. Fast Page Mode Cycle Time, (tp c )

Contextual Info: MOSEL VITE LIC V53C16258H HIGH PERFORMANCE 2 5 6 K X 16 EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH PRELIMINARY 25 28 30 35 40 Max. RAS Access Time, tRAC 25 ns 28 ns 30 ns 35 ns 40 ns Max. Column Address Access Time, (Iqaa ) 13 ns 15 ns 16 ns 18 ns

Contextual Info: M OSEL VI TEL IC V53C818L H IG H P ER FO R M A NC E 3.3 V O L T 512 K X 16 ED O PA G E M O D E CM O S DYNAM IC R A M HIGH PERFORMANCE P R ELIM IN A R Y 40 45 50 60 Max. RAS Access Time, tRAC 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA)

Contextual Info: M i i V VITELIC V53C400 HIGH PERFORMANCE, LOW POWER 4M X 1 BIT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, (tpc)

Contextual Info: M OSEL VITELIC V53C818H HIGH PERFORMANCE 512K X 16 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE PRELIMINARY 30 35 40 45 50 Max. RAS Access Time, tp^c 30 ns 35 ns 40 ns 45 ns 50 ns Max. Colum n Address Access Time, (tQ ^ ) 16 ns 18 ns 20 ns 22 ns 24 ns

Contextual Info: M O S E L V IT E L IC V53C16258H H IG H P ER FO R M A NC E 25 6K X 16 ED O P A G E M O D E CM O S DYNAM IC R A M OPTIONAL S E L F R EFR ESH HIGH PERFORMANCE P R ELIM INA R Y 25 27 30 35 40 Max. RAS Access Tim e, tRAC 25 ns 27 ns 30 ns 35 ns 40 ns Max. Column Address Access Time, (tCAA)

TMS55161

Contextual Info: TMS55160, TMS55161, TMS55170, TMS55171 262144 BY 16-BIT MULTIPORT VIDEO RAMS SMVS464 – MARCH1996 D D D D D D D D D D D Organization: DRAM: 262 144 Words x 16 Bits SAM: 256 Words × 16 Bits Single 5.0-V Power Supply ±10% Dual-Port Accessibility – Simultaneous and

kyoritsu 4111

Abstract: PCB of STK 4191 FCC907S STK 4191 F2MC-16 mb90700
Contextual Info: FUJITSU SEMICONDUCTOR CONTROLLER MANUAL CM81-00204-1E FR FAMILY F²MC FAMILY 32/16/8-BIT MICROCONTROLLER SOFTUNE C COMPILER MANUAL PREFACE • Objective of This Manual and Target Readers This manual describes the F2MC-16 family C compiler hereinafter referred to as the compiler

Contextual Info: MOSEL VITELIC PRELIMINARY V53C16258L HIGH PERFORMANCE 3.3 VOLT 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE 40 45 50 60 Max. RAS Access Time, tRAC 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, (tPC)

K1149

Abstract: 50-to-75 RASCO k1519 ECL10KH K1149BA K1149CA K1523BA K1524AA power supply 5v dc
Contextual Info: K1149 Series ECL Compatible Oscillators ECL10KH Based Design - provides im­ proved rise and fall times, duty cycle, noise margins and power supply rejection over the earlier 10K family while retaining compatibil­ ity. Open emitter output allows the user to

45l50

Abstract: V53C104H
Contextual Info: M O S E L V I T E L IC V53C104H U LTR A -H IG H PERFO RM ANCE, L O W P O W ER 2 5 6 K X 4 B IT F A S T P A G E M O D E CM O S D YN A M IC R A M HIGH PERFORMANCE 45/45L 50/50L 55/55L 60/60L Max. RAS Access Time, 1RAC 45 ns 50 ns 55 ns 60 ns Max. Column Address Access Time, (tCAA)