736-Pin
Abstract: LSI coreware library 64X144
Contextual Info: ADVANCE DATASHEET RC1800 Foundation Slice Family July 2005 The RapidChip RC1800 Foundation Platform ASIC Family, except for the RC1812 slice, is in NO-NEW-DESIGN Status as of July 2005. LSI Logic is not accepting new designs in this slice Family. Information in this datasheet is
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RC1800
RC1812
DB14-000253-04
DB14-000253-04,
DB14-000253-03
736-Pin
LSI coreware library
64X144
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DDR PHY ASIC
Abstract: gigablaze L79301 OC192
Contextual Info: L79301: StreamSlice A Configurable 10 Gb/s Platform OVERVIEW y r a LSI Logic's StreamSlice, the first offering in the RapidChip configurable product family, is a next-generation platform for high-speed 20 Gb/s FullDuplex throughput datapath applications. The device contains pre-designed,
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L79301:
R20036
DDR PHY ASIC
gigablaze
L79301
OC192
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gigablaze
Abstract: 11-G02 TRANSISTOR A98 0.18-um CMOS technology multiplexer data sheet LSI gigablaze LSI gigablaze serdes MIPS32 RC11XT404 lsi asic databook RC11XT432
Contextual Info: ADVANCE DATASHEET RapidChip Xtreme Platform ASIC Family July 2004 DB08-000245-00 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.
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DB08-000245-00
DB08-000245-00,
672-Ball
896-Ball
gigablaze
11-G02
TRANSISTOR A98
0.18-um CMOS technology multiplexer data sheet
LSI gigablaze
LSI gigablaze serdes
MIPS32
RC11XT404
lsi asic databook
RC11XT432
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transistor P2P
Abstract: FCBGA-896 LSI Rapidchip DDR PHY ASIC epbga ARM926 RC1812 RC1832 RC1840 RC1845
Contextual Info: RapidChip Foundation Platform ASIC The Cornerstone of Platform ASICs OVERVIEW FEATURES High performance Platform ASIC The RapidChip Foundation Platform ASIC IP-rich slices are designed for a broad range of applications. The RapidChip™ Foundation Platform ASIC family delivers
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B20041
transistor P2P
FCBGA-896
LSI Rapidchip
DDR PHY ASIC
epbga
ARM926
RC1812
RC1832
RC1840
RC1845
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a103 636 transistor
Abstract: MIPS32 cache LSI Rapidchip K9CFG CFG102 ARM926 ARM926EJ-S DB04-000094-02 Preliminary Gflx-r RapidChip Cell Technology Data infiniband PHY
Contextual Info: DATASHEET RapidChip Integrator Platform ASIC Family July 2004 Preliminary DB08-000237-02 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using
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DB08-000237-02
DB08-000237-02,
a103 636 transistor
MIPS32 cache
LSI Rapidchip
K9CFG
CFG102
ARM926
ARM926EJ-S
DB04-000094-02
Preliminary Gflx-r RapidChip Cell Technology Data
infiniband PHY
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FCBGA-896
Abstract: B200-44 ARM966 ARM926 RC11XT404 RC11XT416 RC11XT432 RC11XT531 serdes LSI B20044
Contextual Info: RapidChip Xtreme Platform ASIC The Serial Interconnect Platform OVERVIEW FEATURES The RapidChip Xtreme Platform ASIC family offers designers a no-compromise approach to high-speed interface design. The RapidChip Xtreme Platform ASIC family delivers the fast time-to-market and reduced
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250MHz
RC11XT531
FCBGA-896
B200-44
ARM966
ARM926
RC11XT404
RC11XT416
RC11XT432
RC11XT531
serdes LSI
B20044
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ddr phy
Abstract: rapidchip LSI coreware library DDR PHY ASIC CW108005 L79301 OC192 LSI Rapidchip Gigablaze serdes CMOS LSI gigablaze serdes
Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while
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L79301
80-bit
ddr phy
rapidchip
LSI coreware library
DDR PHY ASIC
CW108005
L79301
OC192
LSI Rapidchip
Gigablaze serdes CMOS
LSI gigablaze serdes
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L69301
Abstract: L6930 LSI Rapidchip g12 transistor
Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while
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L79301
L79301
80-bit
DB08-000215-00
L69301
L6930
LSI Rapidchip
g12 transistor
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lsi gigablaze transceiver
Abstract: LVTTL25
Contextual Info: DATASHEET RC11XT531 RapidChip Platform ASIC December 2003 Advance DB08-000236-01 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.
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RC11XT531
DB08-000236-01
DB08-000236-01,
DB08-000236-01
lsi gigablaze transceiver
LVTTL25
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LVTTL18
Abstract: LSI Rapidchip epbga DB06-000160-04 DB06-000471-01
Contextual Info: DATASHEET Entry-Level RapidChip Platform ASIC Slices RC1812, RC18Si150, RC18Si184 October 2005 Advance ® DB08-000300-00 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves
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RC1812,
RC18Si150,
RC18Si184
DB08-000300-00
DB08-000300-00,
EBG512,
LVTTL18
LSI Rapidchip
epbga
DB06-000160-04
DB06-000471-01
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mdu 2653
Abstract: mdu 2654 BGA1152 transistor Arm 3055 equivalent Gigablaze serdes CMOS h27 j1 3003 RC1800 A207 resistor R10 J 2995 FC1152
Contextual Info: DATASHEET RapidChip Integrator Platform ASIC Family February 2005 Preliminary DB08-000237-03 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the
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DB08-000237-03
DB08-000237-03,
1152-Ball
mdu 2653
mdu 2654
BGA1152
transistor Arm 3055 equivalent
Gigablaze serdes CMOS
h27 j1 3003
RC1800
A207
resistor R10 J 2995
FC1152
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011U
Abstract: LSI coreware library ARM11 lsi logic ARM11 "instruction set summary" armv5te cp14 ARM coprocessor
Contextual Info: DATASHEET 0.11µ ARM966E-S Processor cw001163_1_0 October 2004 Preliminary DB08-000257-00 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using
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ARM966E-STM
cw001163
DB08-000257-00
DB08-000257-00,
ARM966E-S
011U
LSI coreware library
ARM11 lsi logic
ARM11 "instruction set summary"
armv5te cp14
ARM coprocessor
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ARM1156T2-S
Abstract: AMBA AXI to APB BUS Bridge AMBA AXI to APB BUS Bridge architecture PL022 AXI-64 interface ARM processor data flow PL300 AMBA AHB to AXI AMBA AHB bus protocol ARM1156T2S
Contextual Info: ARM1156T2-S TCM-only Processor with ECC Protection and Reference Design CW001145 FEATURES • 450 MHz timing-closed hardmac OVERVIEW The LSI Logic implementation of the ARM1156T2-S processor for cell-based ASIC provides an integration friendly solution for applications like mass storage
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ARM1156T2-S
CW001145
ARM966E-S
C20069
AMBA AXI to APB BUS Bridge
AMBA AXI to APB BUS Bridge architecture
PL022
AXI-64 interface
ARM processor data flow
PL300
AMBA AHB to AXI
AMBA AHB bus protocol
ARM1156T2S
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ba05 regulator
Abstract: transistor code ak31 transistor BA29 AU04 3M RC7301 ba05 hp invent j04 RC1800 LSI Rapidchip 2aw22
Contextual Info: DATASHEET RC79301 StreamSlice Platform ASIC July 2003 Preliminary DB08-000235-00 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using
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RC79301
DB08-000235-00
DB08-000235-00,
RC79301
responsib75
ba05 regulator
transistor code ak31
transistor BA29
AU04 3M
RC7301
ba05
hp invent j04
RC1800
LSI Rapidchip
2aw22
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RC1800
Abstract: 736-pin FC54 ddr phy LSI Rapidchip ARM926 "user manual" LSI gigablaze serdes DDR PHY ASIC LSI coreware library ARM926
Contextual Info: DATASHEET RC1800 Foundation Slice Family April 2003 Advance DB14-000253-02 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.
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RC1800
DB14-000253-02
DB14-000253-02,
RC1800
736-pin
FC54
ddr phy
LSI Rapidchip
ARM926 "user manual"
LSI gigablaze serdes
DDR PHY ASIC
LSI coreware library
ARM926
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LSI Rapidchip
Abstract: sfi4.1 CW108005 CW108012 RC11XT531 lsi logic hyperphy
Contextual Info: RapidReady HyperPHY Transceiver CW108005 & CW108012 FEATURES OVERVIEW LSI Logic’s HyperPHY transceiver provides an integration friendly interface for high bandwidth broadband and networking applications. It provides full duplex channels that form serial, point-to-point communication channels at data rates up
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CW108005
CW108012)
1300Mb/s.
CW108005)
C20063
LSI Rapidchip
sfi4.1
CW108005
CW108012
RC11XT531
lsi logic hyperphy
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LSI Rapidchip library
Abstract: LSI LOGIC verilog code for amba ahb bus verilog code for spi4.2 to fifo verilog code AMBA AHB E1110 TR255 TR64 LSI Rapidchip AMBA 3.0 technical summary
Contextual Info: DATASHEET 0.11/0.18 µm ApE1110 Triple-Speed MAC cw101304_ApE1110_1_1 May 2005 DB08-000288-01 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.
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ApE1110
cw101304
ApE1110
DB08-000288-01
DB08-000288-01,
LSI Rapidchip library
LSI LOGIC
verilog code for amba ahb bus
verilog code for spi4.2 to fifo
verilog code AMBA AHB
E1110
TR255
TR64
LSI Rapidchip
AMBA 3.0 technical summary
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ARM926
Abstract: DDR PHY ASIC LSI gigablaze serdes RC1800 LSI Rapidchip DDR1 RAM drawing rc1870 LSI Logic G12
Contextual Info: ADVANCE DATASHEET RC1800 Foundation Slice Family October 2003 DB14-000253-03 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.
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RC1800
DB14-000253-03
DB14-000253-03,
RC1800
ARM926
DDR PHY ASIC
LSI gigablaze serdes
LSI Rapidchip
DDR1 RAM drawing
rc1870
LSI Logic G12
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ARM926EJ-S Implementation Guide
Abstract: ARM926EJ-S verilog coding for APB bridge state machine for ahb to apb bridge 8 pin AHB ARM926E-JS verilog code for amba ahb master AMBA 2.0 AHB to APB BUS Bridge verilog code AMBA AHB to APB BUS Bridge verilog code ARM926EJ-S jtag
Contextual Info: DATASHEET 0.11 µm Processor System for ARM926EJ-S cw001200_agflxr_2_0 February 2005 Preliminary DB08-000261-01 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the
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ARM926EJ-STM
cw001200
DB08-000261-01
cw001124
ARM926EJ-S Implementation Guide
ARM926EJ-S
verilog coding for APB bridge
state machine for ahb to apb bridge
8 pin AHB
ARM926E-JS
verilog code for amba ahb master
AMBA 2.0 AHB to APB BUS Bridge verilog code
AMBA AHB to APB BUS Bridge verilog code
ARM926EJ-S jtag
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ddr phy
Abstract: DDR PHY ASIC LSI Rapidchip CW000722 CW761041 g12 DDR lsi CW761030
Contextual Info: RapidReady DDR-1 SDRAM Physical Layer Core CW761041 & CW000722 OVERVIEW FEATURES LSI Logic’s DDR-I physical layer core (PHY core) provides an integrationfriendly physical layer interface between the memory controller logic of the ASIC and the data and address busses of DDR-I SDRAM memory (see Figure1).
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CW761041
CW000722)
CW761041
18-micron
CW000722
C20057
ddr phy
DDR PHY ASIC
LSI Rapidchip
g12 DDR lsi
CW761030
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