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Catalog Datasheet	Type	Document Tags	PDF
736-Pin Abstract: LSI coreware library 64X144 Contextual Info: ADVANCE DATASHEET RC1800 Foundation Slice Family July 2005 The RapidChip RC1800 Foundation Platform ASIC Family, except for the RC1812 slice, is in NO-NEW-DESIGN Status as of July 2005. LSI Logic is not accepting new designs in this slice Family. Information in this datasheet is	Original	rc1800 rc1812 db14-000253-04 db14-000253-03 +3736-pin lsi coreware library 64x144	PDF
DDR PHY ASIC Abstract: gigablaze L79301 OC192 Contextual Info: L79301: StreamSlice A Configurable 10 Gb/s Platform OVERVIEW y r a LSI Logic's StreamSlice, the first offering in the RapidChip configurable product family, is a next-generation platform for high-speed 20 Gb/s FullDuplex throughput datapath applications. The device contains pre-designed,	Original	l79301 r20036 ddr phy asic gigablaze +1oc192	PDF
gigablaze Abstract: 11-G02 TRANSISTOR A98 0.18-um CMOS technology multiplexer data sheet LSI gigablaze LSI gigablaze serdes MIPS32 RC11XT404 lsi asic databook RC11XT432 Contextual Info: ADVANCE DATASHEET RapidChip Xtreme Platform ASIC Family July 2004 DB08-000245-00 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.	Original	db08-000245-00 672-ball 896-ball gigablaze +911-g02 transistor a98 0.18-um cmos technology multiplexer data sheet lsi gigablaze lsi gigablaze serdes mips32 rc11xt404 lsi asic databook rc11xt432	PDF
transistor P2P Abstract: FCBGA-896 LSI Rapidchip DDR PHY ASIC epbga ARM926 RC1812 RC1832 RC1840 RC1845 Contextual Info: RapidChip Foundation Platform ASIC The Cornerstone of Platform ASICs OVERVIEW FEATURES High performance Platform ASIC The RapidChip Foundation Platform ASIC IP-rich slices are designed for a broad range of applications. The RapidChip™ Foundation Platform ASIC family delivers	Original	b20041 transistor p2p fcbga-896 lsi rapidchip +7ddr phy asic epbga arm926 rc1812 rc1832 rc1840 rc1845	PDF
a103 636 transistor Abstract: MIPS32 cache LSI Rapidchip K9CFG CFG102 ARM926 ARM926EJ-S DB04-000094-02 Preliminary Gflx-r RapidChip Cell Technology Data infiniband PHY Contextual Info: DATASHEET RapidChip Integrator Platform ASIC Family July 2004 Preliminary DB08-000237-02 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using	Original	db08-000237-02 a103 636 transistor mips32 cache lsi rapidchip +7k9cfg cfg102 arm926 arm926ej-s db04-000094-02 preliminary gflx-r rapidchip cell technology data infiniband phy	PDF
FCBGA-896 Abstract: B200-44 ARM966 ARM926 RC11XT404 RC11XT416 RC11XT432 RC11XT531 serdes LSI B20044 Contextual Info: RapidChip Xtreme Platform ASIC The Serial Interconnect Platform OVERVIEW FEATURES The RapidChip Xtreme Platform ASIC family offers designers a no-compromise approach to high-speed interface design. The RapidChip Xtreme Platform ASIC family delivers the fast time-to-market and reduced	Original	250mhz rc11xt531 fcbga-896 b200-44 +7arm966 arm926 rc11xt404 rc11xt416 rc11xt432 serdes lsi b20044	PDF
ddr phy Abstract: rapidchip LSI coreware library DDR PHY ASIC CW108005 L79301 OC192 LSI Rapidchip Gigablaze serdes CMOS LSI gigablaze serdes Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while	Original	l79301 80-bit ddr phy rapidchip +7lsi coreware library ddr phy asic cw108005 oc192 lsi rapidchip gigablaze serdes cmos lsi gigablaze serdes	PDF
L69301 Abstract: L6930 LSI Rapidchip g12 transistor Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while	Original	l79301 80-bit db08-000215-00 l69301 +3l6930 lsi rapidchip g12 transistor	PDF
lsi gigablaze transceiver Abstract: LVTTL25 Contextual Info: DATASHEET RC11XT531 RapidChip Platform ASIC December 2003 Advance DB08-000236-01 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.	Original	rc11xt531 db08-000236-01 lsi gigablaze transceiver lvttl25	PDF
LVTTL18 Abstract: LSI Rapidchip epbga DB06-000160-04 DB06-000471-01 Contextual Info: DATASHEET Entry-Level RapidChip Platform ASIC Slices RC1812, RC18Si150, RC18Si184 October 2005 Advance ® DB08-000300-00 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves	Original	rc1812 rc18si150 rc18si184 db08-000300-00 +6ebg512 lvttl18 lsi rapidchip epbga db06-000160-04 db06-000471-01	PDF
mdu 2653 Abstract: mdu 2654 BGA1152 transistor Arm 3055 equivalent Gigablaze serdes CMOS h27 j1 3003 RC1800 A207 resistor R10 J 2995 FC1152 Contextual Info: DATASHEET RapidChip Integrator Platform ASIC Family February 2005 Preliminary DB08-000237-03 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the	Original	db08-000237-03 1152-ball mdu 2653 mdu 2654 +8bga1152 transistor arm 3055 equivalent gigablaze serdes cmos h27 j1 3003 rc1800 a207 resistor r10 j 2995 fc1152	PDF
011U Abstract: LSI coreware library ARM11 lsi logic ARM11 "instruction set summary" armv5te cp14 ARM coprocessor Contextual Info: DATASHEET 0.11µ ARM966E-S Processor cw001163_1_0 October 2004 Preliminary DB08-000257-00 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using	Original	arm966e-stm cw001163 db08-000257-00 arm966e-s +6011u lsi coreware library arm11 lsi logic arm11 "instruction set summary armv5te cp14 arm coprocessor	PDF
ARM1156T2-S Abstract: AMBA AXI to APB BUS Bridge AMBA AXI to APB BUS Bridge architecture PL022 AXI-64 interface ARM processor data flow PL300 AMBA AHB to AXI AMBA AHB bus protocol ARM1156T2S Contextual Info: ARM1156T2-S TCM-only Processor with ECC Protection and Reference Design CW001145 FEATURES • 450 MHz timing-closed hardmac OVERVIEW The LSI Logic implementation of the ARM1156T2-S processor for cell-based ASIC provides an integration friendly solution for applications like mass storage	Original	arm1156t2-s cw001145 arm966e-s c20069 +9amba axi to apb bus bridge amba axi to apb bus bridge architecture pl022 axi-64 interface arm processor data flow pl300 amba ahb to axi amba ahb bus protocol arm1156t2s	PDF
ba05 regulator Abstract: transistor code ak31 transistor BA29 AU04 3M RC7301 ba05 hp invent j04 RC1800 LSI Rapidchip 2aw22 Contextual Info: DATASHEET RC79301 StreamSlice Platform ASIC July 2003 Preliminary DB08-000235-00 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using	Original	rc79301 db08-000235-00 responsib75 ba05 regulator +9transistor code ak31 transistor ba29 au04 3m rc7301 ba05 hp invent j04 rc1800 lsi rapidchip 2aw22	PDF

RC1800 Abstract: 736-pin FC54 ddr phy LSI Rapidchip ARM926 "user manual" LSI gigablaze serdes DDR PHY ASIC LSI coreware library ARM926 Contextual Info: DATASHEET RC1800 Foundation Slice Family April 2003 Advance DB14-000253-02 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.	Original	rc1800 db14-000253-02 736-pin fc54 +7ddr phy lsi rapidchip arm926 "user manual lsi gigablaze serdes ddr phy asic lsi coreware library arm926	PDF
LSI Rapidchip Abstract: sfi4.1 CW108005 CW108012 RC11XT531 lsi logic hyperphy Contextual Info: RapidReady HyperPHY Transceiver CW108005 & CW108012 FEATURES OVERVIEW LSI Logic’s HyperPHY transceiver provides an integration friendly interface for high bandwidth broadband and networking applications. It provides full duplex channels that form serial, point-to-point communication channels at data rates up	Original	cw108005 cw108012 1300mb/s c20063 +4lsi rapidchip sfi4.1 rc11xt531 lsi logic hyperphy	PDF
LSI Rapidchip library Abstract: LSI LOGIC verilog code for amba ahb bus verilog code for spi4.2 to fifo verilog code AMBA AHB E1110 TR255 TR64 LSI Rapidchip AMBA 3.0 technical summary Contextual Info: DATASHEET 0.11/0.18 µm ApE1110 Triple-Speed MAC cw101304_ApE1110_1_1 May 2005 DB08-000288-01 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.	Original	ape1110 cw101304 db08-000288-01 lsi rapidchip library +9lsi logic verilog code for amba ahb bus verilog code for spi4.2 to fifo verilog code amba ahb e1110 tr255 tr64 lsi rapidchip amba 3.0 technical summary	PDF
ARM926 Abstract: DDR PHY ASIC LSI gigablaze serdes RC1800 LSI Rapidchip DDR1 RAM drawing rc1870 LSI Logic G12 Contextual Info: ADVANCE DATASHEET RC1800 Foundation Slice Family October 2003 DB14-000253-03 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.	Original	rc1800 db14-000253-03 arm926 ddr phy asic +5lsi gigablaze serdes lsi rapidchip ddr1 ram drawing rc1870 lsi logic g12	PDF
ARM926EJ-S Implementation Guide Abstract: ARM926EJ-S verilog coding for APB bridge state machine for ahb to apb bridge 8 pin AHB ARM926E-JS verilog code for amba ahb master AMBA 2.0 AHB to APB BUS Bridge verilog code AMBA AHB to APB BUS Bridge verilog code ARM926EJ-S jtag Contextual Info: DATASHEET 0.11 µm Processor System for ARM926EJ-S cw001200_agflxr_2_0 February 2005 Preliminary DB08-000261-01 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the	Original	arm926ej-stm cw001200 db08-000261-01 cw001124 +10arm926ej-s implementation guide arm926ej-s verilog coding for apb bridge state machine for ahb to apb bridge 8 pin ahb arm926e-js verilog code for amba ahb master amba 2.0 ahb to apb bus bridge verilog code amba ahb to apb bus bridge verilog code arm926ej-s jtag	PDF
ddr phy Abstract: DDR PHY ASIC LSI Rapidchip CW000722 CW761041 g12 DDR lsi CW761030 Contextual Info: RapidReady DDR-1 SDRAM Physical Layer Core CW761041 & CW000722 OVERVIEW FEATURES LSI Logic’s DDR-I physical layer core (PHY core) provides an integrationfriendly physical layer interface between the memory controller logic of the ASIC and the data and address busses of DDR-I SDRAM memory (see Figure1).	Original	cw761041 cw000722 18-micron c20057 +5ddr phy ddr phy asic lsi rapidchip g12 ddr lsi cw761030	PDF

RAPIDCHIP Search Results

RAPIDCHIP Datasheets Context Search

736-Pin

DDR PHY ASIC

gigablaze

transistor P2P

a103 636 transistor

FCBGA-896

ddr phy

L69301

lsi gigablaze transceiver

LVTTL18

mdu 2653

011U

ARM1156T2-S

ba05 regulator

RC1800

LSI Rapidchip

LSI Rapidchip library

ARM926

ARM926EJ-S Implementation Guide

ddr phy