GIGABLAZE Search Results

gigablaze

Abstract: LSI gigablaze serdes LSI R1109 MIPI LSI gigablaze serdes serdes transceiver GQ-100 lsi gigablaze transceiver LSI serdes CMOS
Contextual Info: LSI LOGIC SpeedBlazerTM GQ-100 Quad Multi-Gigabit Serial Transceiver Advance Product Information Features ! Four GigaBlaze integrated transceiver cores ! Four complete serializers/deserializers Serdes ! Full duplex operation ! Serial data rates: 3.125, 2.5, 2.125, 1.25, and

LSI serdes CMOS

Abstract: L84700 LSI LOGIC LSI gigablaze serdes epbga LSI Logic EPBGA 10G serdes 2.5 quad 8b/10b decoder gigablaze L80710
Contextual Info: SpeedBlazerTM L80710 10 Gigabit and L84700 Quad Serializer/Deserializer OVERVIEW FEATURES The SpeedBlazer L80710 and L84700 consist of four separate full duplex serializers/deserializers SerDes . Based on LSI Logic’s GigaBlaze technology, each channel of the device is designed to transmit and receive serial data at

LSIFC929

Abstract: LSIFC909 PC99
Contextual Info: LSIFC929 Dual Channel Fibre Solutions LSIFC929 HARDWARE FEATURES • Fusion-MPT architecture • Highly-integrated 2 Gbit dual-channel, full duplex Fibre Channel protocol controller • GigaBlaze™ 2 Gbit serial link • Auto-negotiation for legacy connect

LSIFC919

Abstract: LSIFC909 PC99 Nport
Contextual Info: LSIFC919 Single Channel Fibre Solutions LSIFC919 HARDWARE FEATURES • Fusion-MPT architecture • Highly-integrated 2 Gbit single-channel, full duplex Fibre Channel protocol controller • GigaBlaze™ 2 Gbit serial link • Auto-negotiation for legacy connect

LSI LOGIC

Abstract: IEEE8023 L80711 L84701 10 gbps transceiver serdes LSI rca cmos lsi products
Contextual Info: SpeedBlazer L80711 and L84701 Quad Multi-Gigabit Serial Transceiver DESCRIPTION FEATURES The SpeedBlazer L80711 and L84701 consist of four separate full duplex Serializers/Deserializers SerDes . Based on LSI Logic’s GigaBlaze® technology, each channel of the device is designed to transmit and receive serial data at

011U

Abstract: LSI coreware library ARM11 lsi logic ARM11 "instruction set summary" armv5te cp14 ARM coprocessor
Contextual Info: DATASHEET 0.11µ ARM966E-S Processor cw001163_1_0 October 2004 Preliminary DB08-000257-00 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using

736-Pin

Abstract: LSI coreware library 64X144
Contextual Info: ADVANCE DATASHEET RC1800 Foundation Slice Family July 2005 The RapidChip RC1800 Foundation Platform ASIC Family, except for the RC1812 slice, is in NO-NEW-DESIGN Status as of July 2005. LSI Logic is not accepting new designs in this slice Family. Information in this datasheet is

Contextual Info: LSISASx12 12-Port 3Gb/s SAS Expander http://lsilogic.com/storage APPLICATIONS • Enterprise servers – 1U/2U rack mount servers – Blade servers – Tower servers ■ Storage subsystems – RAID LSI Logic’s Serial Attached SCSI expander is ideal for servers and storage

Fusion-MPT Message Passing Interface Specification

Contextual Info: TECHNICAL MANUAL LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller November 2004 Version 3.0 DB14-000274-03 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

LSISAS1068e

Contextual Info: LSISAS1068E 8-Port PCI Express to 3Gb/s SAS Controller http://lsilogic.com/storage APPLICATIONS • Entry-level servers – 1U/2U rack mount servers EXTENDS 20 YEARS OF SCSI TECHNOLOGY TO NEXT G E N E R AT I O N P R O D U C T P L AT F O R M S F O R H I G H P E R F O R M A N C E ,

L64005

Abstract: L64108 54 L64108 LSI L64108 MULTI2 L64005 A/V Decoder Conditional access module L64768 intel 8251 SDP1100
Contextual Info: L64108 Transport with Embedded CPU and Control Overview Fe atures and Benefits The L64108 combines a 32-bit 54 MHz RISC CPU, a programmable transport demultiplexer, a DVB Descrambler, a DRAM controller and other peripherals on a single chip. This versatile device interfaces to all of the other members of

G11 transistor

Abstract: 6T SRAM LSI ASIC lsi gigablaze transceiver transistor G11 ADC Verilog Implementation
Contextual Info: G11 A S I C C e l l - B a s e d P r o d u c t s Eleventh Generation ASIC Technology Overview LSI Logic’s G11 ASIC product family offers two distinct products—one optimized for high performance G11-p , the other for low power (G11-v)—enabling designers to meet divergent cost/performance requirements, whether it is for networking, telecoms/wireless, computer or consumer applications. Based on a single

LSIFC929X

Abstract: PAR64 REQ64 xcvr
Contextual Info: LSIFC929X Dual Channel Fibre Solutions HARDWARE FEATURES • Highly-integrated 2 Gbit dual-channel, full duplex Fibre Channel protocol controller • 64-bit, 133 MHz PCI-X host bus interface LSIFC929X single-chip, dual-channel Fibre Channel controller increases system

DDR PHY ASIC

Abstract: gigablaze L79301 OC192
Contextual Info: L79301: StreamSlice A Configurable 10 Gb/s Platform OVERVIEW y r a LSI Logic's StreamSlice, the first offering in the RapidChip configurable product family, is a next-generation platform for high-speed 20 Gb/s FullDuplex throughput datapath applications. The device contains pre-designed,

SYM53C8XX

Abstract: symbios scsi-1 LSI 2417 SYM53C895
Contextual Info: Lr SYM53C895 Data Sheet SYM53C895 PCI-to-Ultra2 SCSI I/O Processor The SYM53C895 is a PCI-to-Ultra2 SCSI I/O Processor incorporating Universal Low Voltage Differential LVD signaling for SCSI. LSI Logic’ implementation of LVD transceivers is called LVDlink which meets all of the requirements of

DB14-000174-02

Abstract: DB14-000174 LSIFC919X Fusion-MPT Message Passing Interface MPI specification PAR64 transducers for engines ARM PCI hybrid "User Datagram Protocol" Fusion-MPT Message Passing Interface Specification LSI Message Passing Interface MPI specification
Contextual Info: TECHNICAL MANUAL LSIFC919X Single Channel Fibre Channel I/O Processor June 2003 Version 2.0 DB14-000225-00 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

Contextual Info: LSI LOGIC SYM53C896 Data Sheet SYM53C896 PCI-Dual Channel Ultra2 SCSI Multi-function Controller In the fast-growing server and workstation marketplace, higher levels of performance and integration are required to stay competitive. As a result, data accessibility and the subsequent

ARM1156T2-S

Abstract: AMBA AXI to APB BUS Bridge AMBA AXI to APB BUS Bridge architecture PL022 AXI-64 interface ARM processor data flow PL300 AMBA AHB to AXI AMBA AHB bus protocol ARM1156T2S
Contextual Info: ARM1156T2-S TCM-only Processor with ECC Protection and Reference Design CW001145 FEATURES • 450 MHz timing-closed hardmac OVERVIEW The LSI Logic implementation of the ARM1156T2-S processor for cell-based ASIC provides an integration friendly solution for applications like mass storage

LSISAS1068

Abstract: LSISASx12 LSI Logic SAS controller chip SFF-8485 epbga ARM 9 processor Using nvsRAM in RAID Controller Applications Fusion-MPT Message Passing Interface Specification
Contextual Info: LSISAS1068 8-Port 3Gb/s SAS Controller http://lsilogic.com/storage APPLICATIONS • Entry-level servers – 1U/2U rack mount servers ■ Mid-range, high-end servers ■ Storage subsystems FEATURES ■ EXTENDS 20 YEARS OF SCSI TECHNOLOGY TO NEXT G E N E R AT I O N P R O D U C T P L AT F O R M S F O R H I G H P E R F O R M A N C E ,

Fusion-MPT Message Passing Interface Specification

Abstract: Fusion-MPT Message Passing Interface MPI specification LSIFC929XL DB14-000174-02 256X8BIT LSIFC9
Contextual Info: TECHNICAL MANUAL LSIFC929XL Dual Channel Fibre Channel I/O Processor October 2005 Version 2.0 DB14-000272-01 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

CompactPCI bus termination

Abstract: TQ8025
Contextual Info: Catalog 1 3 0 7 5 1 5 Issued 9-99 H o w to Design Using This Section Select a Bus Architecture Bus Name_ Description_Key Features_ Maximum Bandwidth_Page No. Proprietary 3U and 6U support, rugged and reliable packaging, uses

LSISAS1064E

Abstract: SFF-8485 Fusion-MPT LSI Logic SAS controller chip LSILOGIC LSISASX12 S20163 LSI gigablaze lsisasx12a
Contextual Info: LSISAS1064E 4-Port PCI Express to 3Gb/s SAS Controller http://lsilogic.com/storage APPLICATIONS • Entry-level servers – 1U/2U rack mount servers – Blade servers EXTENDS 20 YEARS OF SCSI TECHNOLOGY TO NEXT G E N E R AT I O N P R O D U C T P L AT F O R M S F O R H I G H P E R F O R M A N C E ,

SYM53C141

Abstract: SYM53C120 SYM53C895 lsi gigablaze transceiver LT/SG3527A
Contextual Info: SYM53C141 Data Sheet SYM53C141 LVD SCSI Bus Ex pander Features Ÿ Attaches single-ended SCSI devices to a Low Voltage Differential LVD SCSI bus Ÿ Accepts any asynchronous or synchronous transfer speed up to Ultra SCSI Ÿ Operates as a SCSI Bus Converter or Repeater

mrc 437

Abstract: ARMv5 instruction set mcr 5102 str 2656 SVC 561 14 ARM940T ARM946E-S ARM966E-S CP14 CP15
Contextual Info: Technical Manual ARM966E-S Microprocessor Core June 2001 Preliminary This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using