RANGE19 Search Results

RANGE19 Datasheets (3)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
S9012(RANGE:190-300)		JCET Group	PNP transistor in a TO-92 package with a collector current of -0.5 A, collector-emitter voltage of -25 V, power dissipation of 625 mW, and DC current gain (hFE) ranging from 64 to 400.	Original	PDF
S9013-TA(RANGE:190-300)		JCET Group	NPN transistor in TO-92 plastic package, with 25 V collector-emitter voltage, 500 mA continuous collector current, 625 mW collector dissipation, and DC current gain ranging from 64 to 400.	Original	PDF
S9013(RANGE:190-300)		JCET Group	S9013 NPN transistor in TO-92 package with 25V collector-emitter voltage, 500mA continuous collector current, 625mW power dissipation, and DC current gain ranging from 64 to 400.	Original	PDF

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Carling Technologies


Carling Technologies VC1-05 CONNECTOR ORANGE (190-17500-005\|\|) ACCESSORY, HARDWARE, CONNECTOR, V SERIES ROCKER SWITCHES
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RS	VC1-05 CONNECTOR ORANGE (190-17500-005\|\|)	Bulk		6 Weeks	20	1 - 10 - 100 $3.18 1000 $2.94 10000 $2.94	Get Quote

RANGE19 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: PRELIMINARY C Y 7C 374i UltraLogic 128-Macrocell Flash CPLD Features • • • • 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface • Bus Hold capabilities on all l/Os and dedicated inputs	OCR Scan	128-Macrocell 84-pin 100-pin CY7C373i CY7C374i FLASH370iâ 173SR CY7C374i	PDF
3140ca Contextual Info: fax id: 5220 CYPRESS CY7C008/009 CY7C018/019 PRELIMINARY 64K/128K x 8/9 Dual-Port Static RAM Features ' Fully asynchronous operation ' Automatic power-down •Expandable data bus to 16/18 bits or more using Mas ter/Slave chip select when using more than one device	OCR Scan	CY7C008/009 CY7C018/019 64K/128K CY7C008) CY7C009) CY7C018) CY7CQ19) 35-micron CY7C018-20AI 100-Pin 3140ca	PDF
CY82C694 Abstract: cy82 Contextual Info: PRELIM INARY CYPH CY82C694 Pentium hyperCache™ Chipset 128KB Expansion RAM Features • Interfaces directly to hyperCache™ Chipset at 66 MHz with 0 wait states » Synchronous pipelined operations with registered in puts and outputs • 16K x 64 common I/O architecture	OCR Scan	CY82C694 128KB CY82C694 cy82	PDF
CY7C1354 Abstract: CY7C1354V25 CY7C1356V25 ISIS Timing Controller Contextual Info: CYPRESS CY7C1354V25 CY7C1356V25 PRELIMINARY 256Kx36/512Kx18 Pipelined SRAM with NoBL Architecture Features • Pin com patible and functionally equivalent to ZBT™ • Supports 200-M Hz bus operations with zero wait states — Data is transferred on every clock	OCR Scan	CY7C1354V25 CY7C1356V25 256Kx36/512Kx18 200-MHz 166-MHz 133-MHz 100-MHz CY7C1354 CY7C1354V25 CY7C1356V25 ISIS Timing Controller	PDF
ECG book Abstract: RETU 3.02 17313L Contextual Info: BURR-BROüJN CORP H E D ll7 3 1 3 b S -' T \| B O : " ? i - i \| - 0 7 W I \| 00130^ ^ — IN A 1 0 1 « • at MILITARY & DIE V E R S IO N S A V A IL A B L E lÏ Ÿ ^ W 1 '» ? Very-High Accuracy INSTRUMENTATION AMPLIFIER FEA T U R ES	OCR Scan	25/iV 13nV/\/Hz 106dB INA101 17313b5 INA101 17313L PGA102. ECG book RETU 3.02	PDF
Contextual Info: PRELIMINARY CY82C694 Pentium hyperCache™ Chipset 128KB Expansion RAM Features • Interfaces directly to hyperCache™ Chipset at 66 MHz with 0 wait states • Synchronous pipelined operations with registered in puts and outputs • 16K x 64 common I/O architecture	OCR Scan	CY82C694 128KB 128-pin	PDF
CY7C1355V25 Abstract: CY7C1357 CY7C1357V25 Contextual Info: CY7C1355V25 CY7C1357V25 PRELIMINARY y CYPRESS 256Kx36/512Kx18 Flow-Thru SRAM with NoBL Architecture Features • Pin compatible and functionally equivalent to ZBT™ de vices • Supports 133-MHz bus operations with zero wait states — Data is transferred on every clock	OCR Scan	CY7C1355V25 CY7C1357V25 256Kx36/512Kx18 133-MHz 117-MHz 100-MHz 80-MHz CY7C1355V25 CY7C1357 CY7C1357V25	PDF
Contextual Info: _ RoboClockll CY7B994V C Y P R E S S PRELmNÂR¥_ CY7B993V High-Speed Multi-Phase PLL Clock Buffer Functional Description Features • 12/100-MHz (CY7B993V , or 24/185-MHz (CY7B994V) output operation • Matched pair outputs skew <200 ps • Zero input-to-output delay	OCR Scan	CY7B994V CY7B993V 12/100-MHz CY7B993V) 24/185-MHz CY7B994V)	PDF
Contextual Info: fax id: 5206 CY7C024/0241 CY7C025/Q251 CYPRESS 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int, Busy Functional Description Features True Dual-Ported memory cells which allow simultaneous reads of the same memory location 4K x 16 organization CY7C024	OCR Scan	CY7C024) CY7C0241) CY7C025) CY7C0251) 65-micron 84-pin CY7C024/0241 CY7C025/0251 CY7C0251 CY7C0251-25AC	PDF
Contextual Info: CYPRESS PRELIM INARY CY82C694 Pentium hyperCache™ Chipset 128KB Expansion RAM Features • Interfaces directly to hyperCache™ Chipset at 66 MHz with 0 wait states » Synchronous pipelined operations with registered in puts and outputs • 16K x 64 common I/O architecture	OCR Scan	CY82C694 128KB	PDF
AOR12 Abstract: 893Q Contextual Info: fax id: 5205 CY7C145 CY7C144 CYPRESS 8K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features are included on the CY7C144/5 to handle situations when mul tiple processors access the same piece of data. Two ports are provided permitting independent, asynchronous access for	OCR Scan	CY7C144) CY7C145) 65-micron 68-pin 64-pin 80-pin IDT700 IDT7015 CY7C145 CY7C144 AOR12 893Q	PDF