AOR12 Search Results

Shared resource arbitration

Contextual Info: miMHS PRELIMINARY March 1994 L 67005 DATA SHEET 8 KX 8 CMOS DUAL PORT RAM 3.3 VOLT FEATURES VERSATILE PIN SELECT FOR MASTER OR SLAVE: - M/S= H FOR BUSY OUTPUT FLAG ON MASTER - M/S = L FOR BUSY INPUT FLAG ON SLAVE INT FLAG FOR PORT TO PORT COMMUNICATION FULL HARDWARE SUPPORT OF SEMAPHORE

Contextual Info: TOSHIBA TLCS-900 Series TM P93CM40/TMP93CM41 Low Voltage/Low Power CMOS 16-bit Microcontrollers TMP93CM40F/TMP93CM41F 1. Outline and Device Characteristics TMP93CM40/M41 are high-speed advanced 16-bit microcon­ trollers developed for controlling medium to large-scale equip­

Contextual Info: .MHS _ electronic June 1992 M 67005 HI-REL DATA SHEET 8kx8 CMOS DUAL PORT RAM FEATURES V E R S A T IL E PIN S E L E C T FOR M A STER OR SLAVE : - M/S = H FOR BUSY OUTPUT FLAG ON MASTER - M/S = L FOR BUSY INPUT FLAG ON SLAVE FAST ACCESS TIME : 35 TO 55 ns

agr02

Contextual Info: HIGH-SPEED 8K x 16 DUAL-PORT STATIC RAM ADVANCE INFORMATION IDT 7025 • Fully asychronous operation from either port FEATURES: • Battery backup operation—2V data retention • High-speed access • TTL compatible, single 5V ±10% power supply - Military'. 45/55/70/90ns (max.)

AOR12

Abstract: 893Q
Contextual Info: fax id: 5205 CY7C145 CY7C144 CYPRESS 8K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features are included on the CY7C144/5 to handle situations when mul­ tiple processors access the same piece of data. Two ports are provided permitting independent, asynchronous access for