R6124 Search Results

Y446

Abstract: Y443 y441 POP-12 B1 Y447 Y442
Contextual Info: POP-12 Device OC-12 SONET/SDH Path Overhead Processor, Retimer, and Cross Connect TXC-06603 DATA SHEET PRODUCT PREVIEW DESCRIPTION • Path overhead POH processing for up to 12 x STS-1 SPEs or 4 x VC-4/STS-3c SPEs • 4 Tx and 4 Rx Pointer Tracking State Machines

APPLE A6 CHIP

Abstract: cf325 W07 sot 23 C-492-5 SMD M05 sot23 C4977 cf406 p66 apple c5297 I342
Contextual Info: 8 6 7 PDF CSA CONTENTS IMG5 17" REV E 11/01/05 SYNC MASTER DATE PDF CSA CONTENTS TABLE_TABLEOFCONTENTS_HEAD 2 System Block Diagram FINO-DD 06/20/2005 TABLE_TABLEOFCONTENTS_ITEM 3 4 Power Block Diagram FINO-PC 06/20/2005 5 Table Items FINO-M23 08/26/2005 6

c5129

Abstract: C5149 C5148 88E8001 CPUTEST29H D4203 D4004 u6202 R6130 R6503
Contextual Info: 5 4 3 2 A6M 1 REVISION: 2.0 128-BIT AMD S1g1 D Unbuffer DDR2 SO-DIMM Channel A/B x16 HyperTransport 200/400/800 MHz 638 PIN PACKAGE LVDS nVIDIA Gigabit Ethernet RTL8111B PCI-E x1 CRT C51MV C TV OUT X8 /X4 HyperTransport 200/400/800 MHz BGA 468 PCMCIA 33MHz

y442

Abstract: B1 Y447 y441 transistor Y447 y648-y68F h1h2 Y648 GR-253 PHAST-12E TXC-06212
Contextual Info: POP-12 Device OC-12 SONET/SDH Path Overhead Processor, Retimer, and Cross Connect TXC-06603 DATA SHEET DESCRIPTION • Path overhead POH processing for up to 12 x STS-1 SPEs or 4 x VC-4/STS-3c SPEs • 4 Tx and 4 Rx Pointer Tracking State Machines (PTSM). Each performs pointer tracking of up to

R6121-02

Abstract: BS249
Contextual Info: DRAWING NUMBER! THIRD R6121-02 ANGLE DO PROJECTION NOT SCALE _ • 1 ib 3 È = Z ± = 2 ± T 3 é = 2 ± H Oi r» . in T Q* L ±0-25 {-010 0 4-76' y1b 2 o ¡5 -.R 6129 - 02 |* R6128 - 02 \ ' '• m O t€ B 3 > € R6127 - 01 i. S>íyAü- R 6 1 2 6 -0 2

Contextual Info: POP-12 Device OC-12 SONET/SDH Path Overhead Processor, Retimer, and Cross Connect TXC-06603 DATA SHEET DESCRIPTION • Path overhead POH processing for up to 12 x STS-1 SPEs or 4 x VC-4/STS-3c SPEs • 4 Tx and 4 Rx Pointer Tracking State Machines (PTSM). Each performs pointer tracking of up to

PLC0755P

Abstract: Inventec su508 Inventec VAIL 2.0 35C61 HP multibay C3008 S101B inventec vail 1.0 47N217
Contextual Info: HUANG SHAN SI2 - BUILD - FINAL 2005.02.28 EE DATE POWER DATE DRAWER DESIGN CHECK RESPONSIBLE DATE CHANGE NO. REV 3 SIZE = FILE NAME : XXXX-XXXXXX-XX XXXXXXXXXXXX P/N INVENTEC TITLE VER : HUANG SHAN SIZE CODE A3 CS SHEET REV DOC. NUMBER Model_No 1 OF AX2 68

PAL 012a

Abstract: U5404 88E8001 asus circuit pal 012A C30015 IC U5502 C23010 78L05 D4004
Contextual Info: 5 4 3 2 A6T 1 REVISION: 1.01 128-BIT AMD S1g1 Channel A/B D Unbuffer DDR2 SO-DIMM cc x16 HyperTransport 200/400/800 MHz 638 PIN PACKAGE LVDS nVIDIA Gigabit Ethernet RTL8111B PCI-E x1 C51MV nVIDIA PCI-E x16 CRT G73M X8 /X4 HyperTransport 200/400/800 MHz FWH

PAL 012a

Abstract: 88E8001 HP C6602 ALC660 Asus C30023 MCP51 R30I R6015 C31002
Contextual Info: 5 A 4 3 2 A6Tc 1 REVISION: 2.1 128-BIT AMD S1 Channel A/B x16 D Unbuffer DDR2 SO-DIMM HyperTransport 200/400/800 MHz 638 PIN PACKAGE LVDS nVIDIA Gigabit Ethernet RTL8111B PCI-E x1 C51MV nVIDIA CRT PCI-E x16 G72MV BGA 468 C SDTV X8 /X4 HyperTransport 200/400/800

IRLM2402

Abstract: c4977 cf325 NEC c5292 VD357 C5292 nec NEC "C4305" cf406 C4934 C5248
Contextual Info: 8 6 7 2 3 4 5 CK APPD FINO M23 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 1 REV ZONE ECN ENG APPD DESCRIPTION OF CHANGE DATE 19 397409 ENGINEERING RELEASED

IT8712F-A

Abstract: C4161 asus t6322 CE501 ITE8712 C2625 T6311 cm8562gi VP1010
Contextual Info: 5 4 3 2 A7T/M BLOCK DIAGRAM CPU CORE PWR D Dual Channel DDR2 DDR2 REV.F PAGE 61 1 01_BLOCK DIAGRAM 41_G73M_PCIEX16_1 02_AMD S1 CPU 1 42_G73M_PCIEX16_2 03_AMD S1 CPU(2) 43_G73M_DISPLAY 04_AMD S1 CPU(3) 44_G73M_BIOS&CRY 05_DDR2_SO_DIMM-1 45_G73M_GPIO 06_DDR2_SO_DIMM-2

Marvell 88E1116

Abstract: D6603 ASUS ST6214 L7037 U7106 C51MV MCP51 19V DC 90w C7291 SI4925B
Contextual Info: 5 4 3 2 1 F3T Block Diagram CPU VCORE CPU S1g1 PAGE 61 D DDR2 16M*16 DDR2 16M*16 DDR2 16M*16 DDR2 16M*16 DDR2-667 Dual Channel DDR2 D SO-DIMM X 2 PAGE 5,6 PAGE 2,3,4 128bit Power On Sequence H.T 800 MHz PAGE 39 USB LVDS & INV PAGE 14 C51MV PCIE *16 G73M CRT & TV OUT

t6322

Abstract: c4137 IT8712F-A C4722 C4161 SK C4138 L5107 r6511 C4160 C4163
Contextual Info: 5 4 3 2 A7T/M BLOCK DIAGRAM CPU CORE PWR D Dual Channel DDR2 DDR2 REV.F PAGE 61 1 01_BLOCK DIAGRAM 41_G73M_PCIEX16_1 02_AMD S1 CPU 1 42_G73M_PCIEX16_2 03_AMD S1 CPU(2) 43_G73M_DISPLAY 04_AMD S1 CPU(3) 44_G73M_BIOS&CRY 05_DDR2_SO_DIMM-1 45_G73M_GPIO 06_DDR2_SO_DIMM-2

cf325

Abstract: Broadcom EMI NEC c5292 UE401 c5885 CF-325 CE015 CF219 I1016 C1900 PCB
Contextual Info: 8 6 7 PDF CSA CONTENTS SYNC MASTER DATE PDF CSA CONTENTS 2 System Block Diagram FINO-M23 08/26/2005 4 Power Block Diagram FINO-M23 08/26/2005 5 Table Items FINO-M23 10/07/2005 6 FUNC TEST 1 OF 2 FINO-M23 08/26/2005 7 POWER CONN / ALIAS M33-PC 06/20/2005 8