R0013FLL Search Results

pin diagram of mux

Abstract: rgg1 SY100E155 SY10E155 D5BT Q3-04
Contextual Info: SY10E155 SY100E155 6-BIT 2:1 MUX-LATCH SYNERGY S E M IC O N D U C TO R FEATURES D E S C R IP T IO N • ■ ■ ■ ■ ■ ■ 750ps max. LEN to output 700ps max. D to output Single-ended outputs Asynchronous Master Reset Dual latch-enables . ESD protection of 2000V

100H641

Abstract: H600 SY100H641 SY10H641
Contextual Info: * SINGLE SUPPLY PECL-TTL 1:9 CLOCK DRIVER SYNERGY SEMICONDUCTOR Clockworks PRELIMINARY SY10/100H641 DESCRIPTION FEATURES The SY10H 641 and SY 100H 641 are single supply, low skew translating 1:9 clock drivers. D evices in the Synergy H 600 translator se ries utilize the 28-lead P L C C for optimal

F100K

Abstract: SY100S329DC SY100S329FC CZ514
Contextual Info: LOW-POWER OCTAL ECL/TTL SYNERGY w it h Rr e J is t e Ar t r a n s l a t o r SEMICONDUCTOR ^ Iy T o S _ W l I n H tu lo I t r i DESCRIPTION FEATURES Bi-directional translation ESD protection of 2000V ECL high impedance outputs Registered outputs

Contextual Info: 16-INPUT MULTIPLEXER SYNERGY SY100S364 SEMICONDUCTOR FEATURES • The SY100S364 is a 16-input multiplexer designed for use in high-performance ECL systems. The four Data Select inputs So, S i, S2 , S3 determine the bit from the 16 inputs (In) that will be passed on to the output as shown in