Q11A SWITCH Search Results

Contextual Info: ICSSSTV16859 Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Recommended Applications: • DDR Memory Modules • Provides complete DDR DIMM logic solution with ICS93V857 or ICS95V857 • SSTL_2 compatible data registers Q13A Q12A Q11A

DDR333

Abstract: ICS93V857 ICS95V857 ICSSSTVF16859 PC2100 PC2700 PC3200 Q13A
Contextual Info: ICSSSTVF16859 Integrated Circuit Systems, Inc. Advance Information DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features:

DDR333

Abstract: ICS93V857 ICS95V857 PC2100 PC2700 PC3200 Q13A
Contextual Info: ICSSSTVA16859 Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features: • Differential clock signals

DDR333

Abstract: ICS93V857 ICS95V857 ICSSSTVF16859 PC2100 PC2700 PC3200 Q13A VFQFN
Contextual Info: ICSSSTVF16859 Integrated Circuit Systems, Inc. Advance Information DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features:

A115-A

Abstract: C101 SN74SSTU32864C SN74SSTU32864CGKER
Contextual Info: SN74SSTU32864C 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES542 − JANUARY 2004 D Member of the Texas Instruments D D D D D D D Supports LVCMOS Switching Levels on the Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout

Q11A

Abstract: CY2SSTV16859 JESD78 Q13A
Contextual Info: CY2SSTV16859 13-Bit to 26-Bit Registered Buffer PC2700-/PC3200-Compliant Features • Differential clock inputs up to 280 MHz • Supports LVTTL switching levels on the RESET# pin • Output drivers have controlled edge rates, so no external resistors are required.

Contextual Info: 74SSTU32864CZKERĆJ 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES621 − DECEMBER 2004 D Member of the Texas Instruments D D D D D D D Supports LVCMOS Switching Levels on the Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout

TSSOP64

Abstract: A114 JESD22 JESD78 PCKV857 SSTV16857 SSTV16859 SSTV16859DGG SSTV16859EC D1D13
Contextual Info: INTEGRATED CIRCUITS SSTV16859 2.5 V 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM Product data 2000 Dec 01 File under Integrated Circuits — ICL03 Philips Semiconductors 2002 Feb 19 Philips Semiconductors Product data 2.5 V 13-bit to 26-bit SSTL_2

Contextual Info: 74SSTU32864CZKERĆJ 25ĆBIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES621 − DECEMBER 2004 D Member of the Texas Instruments D D D D D D D Supports LVCMOS Switching Levels on the Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout

Contextual Info: CYM9291 ADVANCE INFORMATION 1M x 36 Pipelined NoBL SRAM Module Features • Operates at 133 MHz • Uses 512K x 18 high-performance Pipelined NoBL™ synchronous SRAMs • 2.5V data inputs/outputs Functional Description The CYM9291 is a high-performance synchronous pipelined

Contextual Info: IDT74SSTVM16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED IDT74SSTVM16859 BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVM16859

IDT74SSTV16859

Abstract: Q11A Q13A SSTV16859
Contextual Info: IDT74SSTV16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O INDUSTRIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: IDT74SSTV16859 DESCRIPTION: • • • • • • 2.3V to 2.7V Operation SSTL_2 Class II style data inputs/outputs

CSPT857C

Abstract: IDT74SSTVF16859 PC2100 PC2700 PC3200 SSTVF16859 Q11A Q13A
Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859

Contextual Info: ICSSSTV16859C Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Recommended Applications: • DDR Memory Modules • Provides complete DDR DIMM logic solution with ICS93V857 or ICS95V857 • SSTL_2 compatible data registers Q13A Q12A

ICSSSTV16859

Abstract: ICSSTV16859 Q11A Q13A
Contextual Info: ICSSSTV16859 Integrated Circuit Systems, Inc. Preliminary Product Preview DDR 13-Bit to 26-Bit Registered Buffer Recommended Application: DDR Memory Modules Product Features: • Differential clock signals • Meets SSTL_2 signal data • Supports SSTL_2 class II specifications on outputs

PC3200

Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: IDT74SSTVF16859 ADVANCE INFORMATION DESCRIPTION: • • • • • • • 2.3V to 2.7V Operation for PC1600, PC2100, and PC2700

Q11A switch

Abstract: PI74 PI74SSTV16859 Q11A Q13A SSTV16859
Contextual Info: PI74SSTV16859

Q11A

Abstract: PI74 PI74SSTV16859 SSTV16859
Contextual Info: PI74SSTV16859

Q11A switch

Abstract: PI74 PI74SSTV16859 Q11A SSTV16859
Contextual Info: PI74SSTV16859

A115-A

Abstract: C101 SN74SSTU32864 SN74SSTU32864GKER D14-D25
Contextual Info: SN74SSTU32864 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES434 – MARCH 2003 D D D D D D D Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer

A115-A

Abstract: C101 SN74SSTU32864E SN74SSTU32864EZKER ddr2 DIMM PCB
Contextual Info: SN74SSTU32864E 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCAS802 – JULY 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2

A115-A

Abstract: C101 SN74SSTU32864 SN74SSTU32864GKER
Contextual Info: SN74SSTU32864 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES434 – MARCH 2003 D D D D D D D Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer

ICS93V857

Abstract: ICS95V857 ICSSSTV16859C Q11A Q13A
Contextual Info: ICSSSTV16859C Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Recommended Applications: • DDR Memory Modules • Provides complete DDR DIMM logic solution with ICS93V857 or ICS95V857 • SSTL_2 compatible data registers Q13A Q12A

Contextual Info: CY2SSTV16859 13-Bit to 26-Bit Registered Buffer PC2700-/PC3200-Compliant Features The CY2SSTV16859 operates from a differential clock CLK and CLK# of frequency up to 280 MHz. Data are registered at crossing of CLK going high and CLK# going low. • Differential clock inputs up to 280 MHz