PRXS Search Results

SW-444

Abstract: SW-444SMB SW-444TR SW-444TR-3000 sp5t switch
Contextual Info: ADVANCED INFORMATION 2V Control Triple-Band GSM/DCS/PCS SP5T Switch 0.5 – 2.0 GHz • • • PRXS GRX GND ANT GSM Power Handling with +2.0V Control Voltage Low Power Consumption. Less than 1µA in Rx mode Integrated Decoder Leadless 4 x 4 mm FQFP-N, 20 Pin Package

rneg2

Contextual Info: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103C DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 gapped clock • Monitor function for frame pulse, clock and data

MT90812AL1

Abstract: TGE-5 EB32
Contextual Info: MT90812 Integrated Digital Switch IDX Advance Information Mar 2011 Features • • • • • • • • • • • • • • • • • • MT90812AP MT90812AL MT90812APR MT90812AP1 MT90812AL1 MT90812APR1 192 channel x 192 channel non-blocking switching

diplexer gsm umts

Abstract: diplexer gsm DCS MASWSS0055 GSM 300 for c9 Tx, RX SHUNT16
Contextual Info: 2V Dual Mode WCDMA & Triple Band GSM/ V 1P.00 DCS/PCS SP6T Switch 0.5 - 2.0 GHz Features 5 mm FQFP-N, 20-Lead n GSM Power Handling with +2.0V Control Voltage n Low Power Consumption. Less than 1 µA in Rx Mode n Integrated Low Loss Diplexer n Integrated Decoder

MEB90812

Abstract: WARBLE TONE GENERATORS intel 8247 circuit diagram of car central lock system conference system MT8952 MT8952B MT90812 MT90812AL MT90812AP
Contextual Info: MT90812 Integrated Digital Switch IDX Advance Information Features • • • • • • • • • • • • • • • • • • 192 channel x 192 channel non-blocking switching 2 local bus streams @ 2Mb/s supports up to 64 channels In TDM mode, the expansion bus supports up

1j63

Abstract: .1J63 7062l
Contextual Info: f QE1F-PIus Device f t r H Quad E1 Framer-Plus TXC-03114 DATA SHEET DESCRIPTION The QE1F-Plus is a four-channel E1 2048 kbit/s framer designed for voice and data communications applications. A dual unipolar or NRZ line interface is supported with full alarm detection and generation per

SA1381

Abstract: SS823 RDATA13 3RA61 AC21T n25h VSS1490 bwd9 HAD44 HAD48
Contextual Info: A B C D REVISIONS ZONE LTR CN8237/CX29704 PCB:BT01-D255-011 A DESCRIPTION INITIAL APPROVED DATE RELEASE 1 1 DL1 DELAYLINE 2.5NS 1 2 U7 3 CN8237 SEGMENTATION SCLK0 R124 18 DL2 B3SCLK0 A3SCLK1 R116 18 DELAYLINE 2.5NS POWER VDD PINS E7, E8, E11, E12, E15, E16

CH341A

Abstract: 03104 bilq AMI 52 732 V TS16 TXC-03114 national alarm RFTS-10 X77H-X70H
Contextual Info: QE1F-Plus Device Quad E1 Framer-Plus TXC-03114 FEATURES DESCRIPTION • Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and transparent non-framing mode • Frame alignment detection and loss of frame

0l15y

Abstract: TU08 MC9S12XDp512 0L15Y AN2726 L15Y MC9S12XDP512 S12X XGate driver bosch M68HC908GZ60
Contextual Info: Freescale Semiconductor Application Note Document Number: AN2726 Rev. 1, 04/2006 XGATE Library: CAN Driver Providing a Full CAN Mailbox System by: Stuart Robb and Steve McAslan MCD Applications East Kilbride, Scotland 1 Introduction This driver provides a full mailbox-based CAN solution

MT8980D

Abstract: MEB90812 MT8952 MT8952B MT90812 MT90812AL MT90812AP MT9160B
Contextual Info: MT90812 Integrated Digital Switch IDX Advance Information Features • • • • • • • • • • • • • • • • • • 192 channel x 192 channel non-blocking switching 2 local bus streams @ 2Mb/s supports up to 64 channels In TDM mode, the expansion bus supports up

msan configuration

Abstract: AB29 AE13 AF29 AG29 MT90500 MT90503
Contextual Info: MSAN-205 MT90500 Replacement Guidelines Application Note Contents 1.0 Introduction 2.0 Hardware Considerations 2.1 Package 2.2 Power and Ground 2.3 CPU Interface 2.4 UTOPIA Interface 2.4.1 PHY & MT90500 2.4.2 PHY & MT90500 & SAR 2.4.3 PHY & MT90500 & MT90500 & SAR

Motorola ic

Contextual Info: MT90500 Multi-Channel ATM AAL1 SAR Features • • • • • • • • • DS5171 AAL1 Segmentation and Reassembly device compatible with Structured Data Transfer SDT as per ANSI T1.630 and ITU I.363 standards Transports 64kbps and N x 64kbps traffic over

CH341A

Abstract: digital trainer schematic diagram laf 0001 CH3401 J0123 ccs ldl HP 3D6 000A75 X77H-X70H TO SI 788 48D
Contextual Info: H i/1 I - = - ^ • QE1F Device Quad E1 Framer TXC-03104 DATA SHEET FEATURES DESCRIPTION • Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and

76 COC 9K

Abstract: VIP 22A 2048KHZ 44145 ch3406
Contextual Info: QE1F Device Quad E1 Framer TXC-03104 DATA SHEET FEATURES DESCRIPTION ^ * Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and transparent non-framing mode * Frame alignment detection and loss of frame

Contextual Info: QE1F Device Quad E1 Framer TXC-03104 DATA SHEET FEATURES DESCRIPTION = • Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and transparent non-framing mode • Frame alignment detection and loss of frame

measurement rf gsm

Abstract: prxa1
Contextual Info: 2V Control Triple-Band GSM/DCS/PCS SP5T Switch, 0.5 - 2.0 GHz V 1P.00 Features 4mm FQFP-N, 20 Lead n GSM Power Handling with +2.0V Control Voltage n Low Power Consumption. Less than 1 µA in Rx Mode n Integrated Decoder n Leadless 4 x 4 mm FQFP-N, 20 Pin Package

HP 3D6

Abstract: GR-499-CORE 23D8 CH3401
Contextual Info: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse

rtss 159

Abstract: 3022h 6042H 3002H 3032h ZARLINK FPGA MT90500 MT90500AL MVIP-90
Contextual Info: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ MT90500

TAB 429 H

Abstract: ch3406
Contextual Info: QT1F-Plus Device t r a n S w it c h QuadTI Framer-Plus TXC-03103 DATASHEET FEATURES DESCRIPTION • D4 SF; ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AM I/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock

c8c1

Contextual Info: Im •■ § QT1F-P/us Device l/lf l T r T H ■ Quad T1 Framer-P/i/s TXC-03103 DATASHEET FEATURES DESCRIPTION • D4 SF; ESF (including HDLC Link support), and transparent framing modes • Delects, counts and forces line code errors (BPVs and excess zeros), CFC errors (ESF only), and frame bit

Contextual Info: Agilent ParBERT 81250 Parallel Bit Error Ratio Tester Product Overview Version 6.0 The only modular parallel bit error ratio test solution with • different modules covering a range of data rates from 333 kHz to 13.5 GHz • up to 66 synchronous input and output channels

Contextual Info: MT90500 S E M IC O N D U C T O R Multi-Channel AAL1 SAR Preliminary Information Features • AAL1 S egm entation and R eassem bly device com patible w ith S tructured Data Transfer SDT as per ANSI T 1 .630 and ITU 1.363 standards • Transports 64kbps and n x 64kbps traffic over

GR-499-CORE

Abstract: CH1290 tds0 1150
Contextual Info: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse

XC2S50-5TQ144C

Abstract: DK101 DK2000 DS10 DS3144 DS3144DK DS3154 CP-BNC-PC 50-Pin DIP Connector SMD motherboard ic list
Contextual Info: DS3144DK Quad DS3/E3 Framer Design Kit Daughter Card www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3144 design kit is an easy-to-use evaluation board for the DS3144 quad DS3/E3 framer. It is intended to be used as a daughter card with the DK101 motherboard or the DK2000 motherboard.