PLESS Search Results

Contextual Info: MAGIC LED PLB111030 Series Advanced Datasheet Description Plessey MAGIC PLB111030 PLCC-2 SMT LEDs are designed for ambient decorative lighting and automotive interior applications. The light is emitted close to a Lambertian distribution and hence this SMT package is naturally suitable for

Contextual Info: MAGIC LED PLB117010 Series Advanced Datasheet Description Plessey MAGIC PLB117010 blue LEDs are designed for ambient decorative lighting. The light is emitted at narrow distribution and hence this T1-3/4 5mm package is naturally suitable for backlight and symbols. The LEDs are packed in bags

Contextual Info: MAGIC LED PLB111010 Series Advanced Datasheet Description Plessey MAGIC PLB111010 PLCC-2 SMT LEDs are designed for ambient decorative lighting and automotive interior applications. The light is emitted close to a Lambertian distribution and hence this SMT package is naturally suitable for

48TQFP

Abstract: PCA3000 PCA3004TPB PCA3006TPA PCA3006TPB 546126
Contextual Info: PCA3000 AUGUST 1994 TARGET INFORMATION DS3829 -1.5 PCA3000 5V 6 CHANNEL MAGNETO-RESISTIVE READ/ THIN FILM WRITE PRE-AMPLIFIER The GEC Plessey Semiconductors PCA3000 is a bipolar monolithic integrated circuit designed for use with a combined magneto-resistive read head and thin film write

DS3235

Abstract: DS3600 DS3235-1 PNC11 P10C68 P11C68 PNC10C68 PNC11C68
Contextual Info: s» 5 Ë GEC PLESSEY MARCH 1993 PRELIMINARY INFORMATION S E M I C O N D U C T O R S D S 3 6 0 0 - 1 .5 P 1 0 C 6 8 /P 1 1 C 6 8 Previously PNC10C68 and PNC11C68 CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM (Supersedes DS3159-1.3, DS3160-1.3, DS3234-1.1, DS3235-1.1)

eel -16-2005

Abstract: SP10119
Contextual Info: SP10119 PLESSEY ECL 10.000 SERIES SEMICONDUCTORS SP10119 4 -W ID E 4 -3 -3 -3 IN P U T O R -A N D GATE The SP10119 is a 4-w ide 4 -3 -3 -3 Input O R -A N D gate with one input from two gates common to pin 10. Input pulldown resistors eliminate the need to tie

maa 550

Abstract: SP1056 SP10564
Contextual Info: SP10564 O PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10564 8 - LINE M ULTIPLEXER T h e S P 1 0 5 6 4 is a h ig h s p e e d , lo w p o w e r E C L e ig h tc h a n n e l d a ta s e le c to r w h ic h ro u te s d a ta p re s e n t at o n e - o f - e i g h t in p u ts to th e o u tp u t. T h e d a ta is ro u te d

SP8611

Abstract: DG14 ECL10K SP8611AC 162-V1
Contextual Info: éÊk PLESSE Y Sem iconductors. SP8611AC 1300MHz - 4- 4 FIXED MODULUS DIVIDER CONFORMS TO MIL-STD-883C CLASS B T he SP8611 is an a s yn ch ro n o u s EC L d ivid e by fo u rc irc u it, w ith EC L c o m p a tib le o u tp u ts w h ic h can also be used to drive

SP10162

Contextual Info: S P 1 016 2 O PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10162 B IN A R Y T O 1 O U T O F 8 D E C O D E R HIGH T h e S P ‘10'162 is d e s ig n e d to c o n v e rt th re e lines of in p u t da ta to o n e * o f- e ig h t o u tp u t. T h e sele c te d o u tp u t

Plessey 159 socket

Abstract: 100ohm SP10502
Contextual Info: SP10502 O PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10502 Q U A D 2-INPUT NOR GATE 5 0 -o h m te rm ina tion to gro un d lo ­ cated in each scope channel inp u t. A ll in p u t and o u tp u t cables to the scope are equal lengths o f 5 0-oh m coaxial cable. W ire length sh ould

SL9999

Abstract: radar block diagram SP97308E
Contextual Info: Ä P LESSEY ' w Semiconductors. PRELIMINARY INFORMATION SP97308E 30MHz ECL 8-BIT FLASH ADC The Plessey SP97308E contains 255 high speed comparators which form a full flash analog to digital converter and requires no sample and hold. Its wideband input allows singals with frequencies up to

SP10576

Abstract: SP10516 SP1057
Contextual Info: SP10516 PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10516 TRIPLE LINE RECEIVER The SP1051 6 is a triple differential am plifier designed fo r use in sensing differential signals over long lines. The base bias supply V b b is made available to make the device useful as a S chm itt trigger, or in other

DG28

Abstract: SP9215
Contextual Info: A PSLE SSEY W o lid S ta te » SP9215 10-BIT 50MHz ECL UP/DOWN COUNTER T h e Plessey SP9215 is an E C L c o m p a tib le 10-bit S yn ch ro n o u s U P /D O W N C o u n te r capable of o p e ra tin g at c lo c k fre que ncies in excess o f 50MHz. T h e c irc u it is

SP10518

Contextual Info: SP10518 O PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10518 D U A L 2 - W I D E 3 - I N P U T O R - A N D GATE T h e S P 1 0 5 1 8 is a b a s ic lo g ic b u ild in g b lo c k p r o v id in g t h e O R - A N D f u n c t io n , u s e fu l in d a ta c o n t r o l a n d d ig ita l

80ki

Abstract: SP10171 RIM q10
Contextual Info: SP10171 O PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10171 D U AL B IN A R Y TO 1 O U T OF 4 DECODER LO W T h e S P 1 0 1 7 1 is a b in a ry c o d e d 2 lin e to d u a l 4 lin e d e c o d e r w ith sele c te d o u tp u ts lo w . W ith e ith e r EO or E1 h ig h , th e c o rre s p o n d in g s e le c te d 4 o u tp u ts are h ig h .

SP10101

Contextual Info: SP10101 O PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10101 Q U A D O R /N O R GATE P O S IT IV E LO GIC Th e S P 10101 is a quad 2 -in p u t O R /N O R g ate w ith one input from each gate com m on to pin 12. Input pulldow n resistors elim inate the need to tie unused

SP10109

Abstract: SP1660
Contextual Info: SP10109 Q PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10109 DUAL 4 -5 -IN P U T O R /N O R GATE P O S IT IV E LO GIC The S P 1 0 1 0 9 is a dual 4 - 5 input O R /N O R gate w hich is pin com patible w ith th e ECL III S P 1 6 6 0 dual O R N O R gate. A ll inputs are term inated by a 5 0 k ohm

SP10160

Abstract: U242
Contextual Info: SP10160 PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10160 1 2 -BIT PARITY GEN ERATOR -C H ECKER P O S IT IV E LO G IC The SP10160 consists o f nine EXCLUSIVE-OR gates in a single package, internally connected to provide odd parity checking or generation. O utp u t goes high w hen

30yW

Abstract: 2114L MV21SC14 MV21SC14-1 MV21SC14-2 MV21SC14-3 UPD444
Contextual Info: MV21SC14 A PLESSEY ADVANCE INFORMATION S e m ic o n d u c t o r s . CMOS Advance inform ation is issued to advise Customers of new additions to the Plessey S em iconductors range which, nevertheless, s till have ‘pre-production’ status. Details given may, therefore, change w ithout notice although we w ould expect th is performance data to

DG2E

Abstract: 74LS MV74SC373 MV74SC374 MV74SC533 MV74SC534 MV74SC563 MV74SC564 MV74SC573 MV74SC574
Contextual Info: PLESSEY W ADVANCE INFORMATION Solid State _ CMOS Advance Information is issued to advise Customers of new additions to the Plessey Semiconductors range which, nevertheless still have p n -p ro d u ctio n status. Details given may, therefore, change without notice although we would expect this performance data to

pj 57

Abstract: 4914 CD 910 coax ECL10 SP10107
Contextual Info: SP10107 9 PLESSEY ECL10,000 SERIES SEMICONDUCTORS SP10107 T R IP L E 2-IN PU T E X C L U S IV E O R /E X C L U S IV E NOR P O S IT IV E LO G IC T h is three gate array is designed to provide the posi­ tive logic E xclu sive O R and E xclu sive N O R functions

SP1690

Abstract: SP1600 SP1670 SP1600 SERIES ECL III
Contextual Info: SP1690 • PLESSEY SP1600 SERIES SEMICONDUCTORS ECL 111 SP1690 UHF PRESCALER TYPE D FUP-FLOP The SP1690 is a h igh speed D m aster-slave f lip - f lo p ca pa ble o f to g g le rates o v e r 5 0 0 M H 2 . D esigned p r im a r ily f o r h igh P O S IT IV E L O G IC

F54 ONS

Contextual Info: P S H G E C PLESSEY ADVANCE INFORMATION DS3507-1.6 VP510 Bl DIRECTIONAL COLOUR SPACE CONVERTER DESCRIPTION FEATURES B B B B B B User definable colour space conversion Sampling rates up to 27 MHz On chip decimating or interpolating FIR filters Conversion from 24 bit inputs to 16 bit outputs or vice

ZN558D

Abstract: ZN558J-8 ZN447 ZN558 ZN556J-8 ZN558E-8 plessey
Contextual Info: PLESSEY 12E SEMICONDUCTORS 1 7220513 □00fl4S3 o | PLESSEY S e m ico n d u c to rs. ZN558 8-BIT LATCHED INPUT MONOLITHIC D-A CONVERTER The ZN558 is a monolithic 8-bit D-A converter with Input latches to facilitate updating from a data bus. The latch is transparent when enable Is LOW and the data is held when