PL28D Search Results
PL28D Result Highlights (2)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| TPS3840PL28DBVR | Texas Instruments | Nanopower high-input voltage supervisor with manual reset and programmable-reset time delay 5-SOT-23 -40 to 125 |
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| TPS3840PL28DBVRQ1 | Texas Instruments | Automotive high-input voltage supervisor with manual reset and programmable-reset time delay 5-SOT-23 -40 to 125 |
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PL28D Price and Stock
TURCK Inc TBDP-L2-8DIP-8DOPFdp; |Turck TBDP-L2-8DIP-8DOP |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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TBDP-L2-8DIP-8DOP | Bulk | 1 |
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Buy Now | ||||||
Texas Instruments PTPS3840PL28DBVRPower Supply Support Circuit, Fixed, 1 Channel, PDSO5 |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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PTPS3840PL28DBVR | 6,385 |
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Get Quote | |||||||
PL28D Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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00XXX001
Abstract: BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12
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or3t20or3t301a-06or3t80+8 | |
30021
Abstract: L48C L41C IC L44C DATASHEET L30C l31c L43C ORSO42G5 ORSO82G5 ORT42G5
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orso42g5orso82g5orso42g5-1bmn484iorso82g5-2fn680i+8 | |
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Contextual Info: ORCA ORLI10G Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC August 2004 Data Sheet Introduction The Lattice ORCA Series 4-based ORLI10G FPSC combines a high-speed line interface with a flexible FPGA logic core. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORLI10G consists |
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orli10g10gbps125gbpsoif-sfi4-01+2 | |
pt45Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.2, June 2006 LatticeSC Family Data Sheet Introduction June 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks |
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ds1004700mhz600mbps125gbps+5 | |
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Contextual Info: AT&T Data Sheet October 1995 Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 |im technology (four-input look-up table delay less than 3.6 ns) |
OCR Scan |
att2c04att2c06att2c08att2c10+6 | |
IC TTL 7495 diagram and truth table
Abstract: BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc
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ds99-087fpgads98-163fpga-01ic ttl 7495 diagram and truth tableba 5979 s+8 | |
PT35c transistor
Abstract: pt35c transistor pt36c me 4946 PBGA PR25D transistor on 4409 307-45 4946 ah lm 458 ic
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16-bitor3l165bor3l225bor3l165b7ps208i-db+16 | |
transistor pt36c
Abstract: datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram
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sink/12transistor pt36cdatasheet transistor pt36cpt35c transistor+7 | |
BA 5979 S
Abstract: or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10
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or3c804ps208i-dbor3c804ba352i-dbor3t206s208i-dbor3t306s208i-db+16 | |
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Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks |
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ds1004700mhz600mbps125gbps+1 | |
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Contextual Info: ORCA ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver November 2003 Data Sheet Introduction Field Programmable System-on-a-Chip (FPSCs) bring a whole new dimension to programmable logic: Field Programmable Gate Array (FPGA) logic and an embedded system solution on a single device. Lattice has developed |
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ort8850channel50h-1bm680cort8850hort8850l+3 | |
1-256 demultiplexerContextual Info: ORCA ORLI10G Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC November 2003 Data Sheet Introduction Lattice has developed a new ORCA Series 4-based FPSC which combines a high-speed line interface with a flexible FPGA logic core. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the |
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orli10g10gbps125gbpsoif-sfi4-01+5 | |
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Contextual Info: ORCA ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver April 2006 Data Sheet Introduction Field Programmable System-on-a-Chip (FPSCs) bring a whole new dimension to programmable logic: Field Programmable Gate Array (FPGA) logic and an embedded system solution on a single device. Lattice has developed |
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ort8850ort8850lort8850hort8850l-2bmn680i+2 | |
PT15D
Abstract: OR2T40A-6PS208I R4C18
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16-bit32-bitor2t10aor2t15a+9 | |
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Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.4b, February 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os |
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ds1004700mhz600mbps125gbps+2 | |
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Contextual Info: ORCA ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver November 2002 Data Sheet Introduction Field Programmable System-on-a-Chip (FPSCs) bring a whole new dimension to programmable logic: Field Programmable Gate Array (FPGA) logic and an embedded system solution on a single device. Lattice has developed |
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ort8850ort8850lort8850hm-ort8850l2bm680-db+3 | |
ORCA ORT42G5Contextual Info: ORCA ORT42G5 and ORT82G5 3.7 Gbits/s XAUI and 4.25 Gbits/s FC FPSCs November 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the |
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ort42g5ort82g5ort42g5-2bm484esort42g5-1bm484es+3 | |
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Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 01.6, August 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os |
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ds1004700mhz600mbps125gbps+1 | |
AL437
Abstract: L97c L235C L103T L41C L140C L94C l165c L239C L43C
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8b/10boif-spi4-02orspi4-1fe1036iesorspi4-f1156ies+14 | |
BA 5979
Abstract: br06 lm 398- SAMPLE AND HOLD OR3T125 OR3T20 OR3T30 OR3T55 PT10 diagram for 3 bits binary multiplier circuit ic 7490 truth table
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ba 5979br06lm 398- sample and holdor3t125+6 | |
L67c
Abstract: L41C l44c L71C l75c transistor l57c IC L44C DATASHEET l31c L47c l51c
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ort42g5ort82g5ort42g5-2bm484esort42g5-1bm484es+12 | |
l37c 8 pin
Abstract: L41C G40TL l34c L43C L74c L18T l14c L25C ENCODER l31c
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ort42g5ort82g5ds10271-800-lattice+12 | |
3006d
Abstract: J1 3009-2 3004c 30054 3005A STM-1 Physical interface PHY A transistor which is related with H1 3003A ort8850h-2bm680c 30042 pad 3006A
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ort88503006dj1 3009-23004c+7 | |
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Contextual Info: Preliminary Data Sheet April 2001 ORCA ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver Introduction Field-programmable system chips (FPSCs) bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single |
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ort8850ds01-094ncipds00-406fpga | |