Part Number
    Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    PHASE LOGIC LOOP Search Results

    PHASE LOGIC LOOP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54F181LM/B
    Rochester Electronics LLC 54F181 - 4-Bit Arithmetic Logic Unit PDF Buy
    100324/VYA
    Rochester Electronics LLC 100324 - TTL to ECL Translator, 6 Func, Complementary Output, ECL - Dual marked (5962-9153001VYA) PDF Buy
    EP1800ILC-70
    Rochester Electronics LLC EP1800 - Classic Family EPLD PDF Buy
    EP600DM-30/B
    Rochester Electronics LLC EP600 - Rochester Manufactured EP600, LOGIC (EPLD) PDF Buy
    EP600DM-25/B
    Rochester Electronics LLC EP600 - Rochester Manufactured EP600, LOGIC (EPLD) PDF Buy

    PHASE LOGIC LOOP Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    AND8040

    Abstract: AND8040/D MC100EP40 MC100LVEL40 PRAD-2
    Contextual Info: AND8040/D Phase Lock Loop General Operations Prepared by: Paul Shockman ON Semiconductor Logic Applications Engineering http://onsemi.com THEORY OF OPERATION A general phase lock loop may be modeled as a reference signal and a feedback signal driving a phase detector logic


    Original
    and8040/dand8040mc100ep40mc100lvel40+1prad-2 PDF

    AND8040

    Abstract: ko 247 MC100LVEL40
    Contextual Info: AND8040/D Phase Lock Loop General Operations Prepared by: Paul Shockman ON Semiconductor Logic Applications Engineering http://onsemi.com APPLICATION NOTE THEORY OF OPERATION A general phase lock loop may be modeled as a reference signal and a feedback signal driving a phase detector logic


    Original
    and8040/dr14525and8040ko 247+1mc100lvel40 PDF

    Contextual Info: Figure 1. Block Diagram F l F l F I F I F ] □ _ Clock Doubler/ Ttoo-Phase Generator PHASE-LOCKED CONTROL LOGIC LOOP P IL \ MUX DIVIDE "0 OUTPUT BUFFER OUTPUT BUFFER OUTPUT BUFFER LlJ Li] /— Oata Sheets F l GA1210E LOGIC OUTPUT BUFFER lD OUTPUT BUFFER


    OCR Scan
    ga1210e500ps16-pin28-pin PDF

    Contextual Info: T R I Q U I N T S E M I C O N D U C T O R, I N C . GA1110E Figure 1. Block Diagram VDD T1 CLKIN FBIN S1 S0 T0 GND 8 7 6 5 4 3 2 1 PHASE-LOCKED LOOP PLL PHASE CONTROL LOGIC Multi-Phase Clock Buffer MUX CONFIGURATION LOGIC Features GND OUTPUT BUFFER OUTPUT


    Original
    ga1110e PDF

    diode BY 399 itt

    Abstract: Q20P010 M/Q20P025
    Contextual Info: DEVICE SPECIFICATION ECL/TTL “TURBO ” LOGIC ARRAYS WITH PHASE-LOCKED LOOP Q20P010/Q20P025 FEATURES On-chip high frequency phase-locked loop Up to 1.25 GHz capability Edge jitter as low as 50 ps pk-pk 900 and 3000 gates of customizable digital logic Utilizes proven Q20000* Series macro library


    OCR Scan
    q2000010opstogp010q20p025+6ii11niiii111nq20p0100001b23diode by 399 ittm/q20p025 PDF

    MC4044

    Abstract: mecl mttl MTTL MC12013 648 ANALOG MC4024 MC12000 MC12012 MC12020 phase logic loop
    Contextual Info: Logic products for phase-locked loop applications M otorola offers the designer a choice o f specially designed integrated circuits fo r perform ing phase-locked loop functions: phase detection, frequency division, filtering , and voltage-controlled signal generation. In


    OCR Scan
    mc12000mc1658mc4024mc4044+9mc12002mc12012mc12013mc12014mc12020mecl mttlmttl648 analogphase logic loop PDF

    MOTION DETECTOR opamp

    Contextual Info: UC1634 UC2634 UC3634 UNITRODE Phase Locked Frequency Controller DESCRIPTION FEATURES Precision Phase Locked Frequency Control System Communication Logic for 2-Phase Motors Disable Input for Motor Inhibit Crystal Oscillator Programmable Reference Frequency Dividers


    OCR Scan
    uc1634uc2634uc3634uc1633+21700ppm/motion detector opamp PDF

    SCHS177B

    Abstract: CD74HC297E HC297 CD74HC297
    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    cd54hc297cd74hc297cd74hct297schs177b+2hc297cd74hc297e PDF

    CD54HC297

    Abstract: CD74HCT297 CD54HC297F3A CD74HC297 CD74HC297E LH211
    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    hc297hct29cd54hc297cd74hc297+7cd74hct297schs177b55mhz35mhzcd54hc297f3acd74hc297elh211 PDF

    CD74HCT297E

    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    cd54hc297cd74hc297cd74hct297schs177b+2hc297cd74hct297e PDF

    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    hc297hct29cd54hc297cd74hc297+4cd74hct297schs177b55mhz35mhz PDF

    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    cd54hc297cd74hc297cd74hct297schs177b+1hc297 PDF

    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    cd54hc297cd74hc297cd74hct297schs177b+1hc297 PDF

    HC297

    Abstract: CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E CD74HCT297
    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    hc297hct29cd54hc297cd74hc297+6cd74hct297schs177b55mhz35mhzcd54hc297f3acd74hc297e PDF

    CD54HC297

    Abstract: CD54HC297F3A CD74HC297 CD74HC297E CD74HCT297
    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    hc297hct29cd54hc297cd74hc297+6cd74hct297schs177b55mhz35mhzcd54hc297f3acd74hc297e PDF

    CD54HC297

    Abstract: CD54HC297F3A CD74HC297 CD74HC297E CD74HCT297 square D KCP
    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    hc297hct29cd54hc297cd74hc297+7cd74hct297schs177b55mhz35mhzcd54hc297f3acd74hc297esquare d kcp PDF

    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


    Original
    cd54hc297cd74hc297cd74hct297schs177b+1hc297 PDF

    74hc297 application notes

    Abstract: SCHA002 HC297 74ls297 SCHA003 74HC297
    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54/74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177A High-Speed CMOS Logic Digital Phase-Locked-Loop November 1997 - Revised May 2000 Features


    Original
    cd54/74hc297cd74hct297schs177ahc297+10dut1996sdya012sn54/74hctscla011scla00874hc297 application notesscha00274ls297scha00374hc297 PDF

    74hc297

    Abstract: SCHS177A 74hc297 application notes CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E CD74HCT297
    Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54/74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177A High-Speed CMOS Logic Digital Phase-Locked-Loop November 1997 - Revised May 2000 Features


    Original
    hc297hct29cd54/74hc297cd74hct297+9schs177a55mhz35mhz74hc29774hc297 application notescd54hc297cd54hc297f3acd74hc297cd74hc297e PDF

    diagram of light sensitive alarm

    Abstract: Digital Alarm Clock 40 pin BLOCK diagram of light sensitive alarm light sensitive alarm PHOTODIODE ALARM CIRCUIT RGR2622 light sensitive alarm circuit digital clock with alarm
    Contextual Info: Fiber Optic “Light to Logic” Receiver with Clock Recovery Preliminary Technical Data RGR2622 Features Applications Description • Light to Logic 20-Pin DIP Receiver Offers ECL Compatibility • Sensitivity: –31 dBm • Phase-Locked Loop PLL Timing Recovery Circuit


    Original
    rgr262220-pindiagram of light sensitive alarmdigital alarm clock 40 pin+5block diagram of light sensitive alarmlight sensitive alarmphotodiode alarm circuitlight sensitive alarm circuitdigital clock with alarm PDF

    Contextual Info: Fiber Optic “Light to Logic” Receiver with Clock Recovery Technical Data RGR1551 Features Applications • Light to Logic 20-pin DIP Receiver offers ECL Compatibility • Long Reach, High Performance • Sensitivity -36 dBm • Phase-locked Loop PLL


    Original
    rgr155120-pinop400rgr1551-xx+4rgr1551-fprgr1551-strgr1551-scrgr1551-dn PDF

    HEF4046BP

    Abstract: HEF4046BT HE4000B HEF4046B HEF4046BD
    Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4046B MSI Phase-locked loop Product specification


    Original
    he4000bhef4046bhef4046bphef4046bt+1hef4046bd PDF

    application of light sensitive alarm

    Abstract: RGR1551 light sensitive alarm diagram of light sensitive alarm
    Contextual Info: Fiber Optic “Light to Logic” Receiver with Clock Recovery Preliminary Technical Data RGR1551 Features Applications • Light to Logic 20-Pin DIP Receiver Offers ECL Compatibility • Long Reach, High Performance • Sensitivity: –36 dBm • Phase-Locked Loop PLL


    Original
    rgr155120-pinapplication of light sensitive alarmlight sensitive alarm+1diagram of light sensitive alarm PDF

    HEF4046B

    Abstract: Family Specifications HEF, HEC HE4000B HEF4046BD HEF4046BP HEF4046BT MS-012AC
    Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4046B MSI Phase-locked loop Product specification


    Original
    he4000bhef4046bot38-1050g09+6mo-001aefamily specifications hef, hechef4046bdhef4046bphef4046btms-012ac PDF