MTTL Search Results

full adder carry look ahead

Abstract: MC5480 MC7480 MMD7000 VIC7480 MC9380
Contextual Info: MTTL Complex Functions MOTOROLA G A T E D FU LL A D D E R M C5480 • M C7480 M C 9 3 8 0 - M C8380 A d d S u ffix S u ffix S u ffix These in puts, The n 0 1 t- F f o r T O - 8 6 c e r a m i c p a c k a g e i C a s t 6 0 •’ . L f o r T O - 1 1 6 c e r a m i c p a c k a g e <C ii s e 6 3 2 .

mc8200

Abstract: MC7284 MC8361 MC724 MC7234 MC7241 mc7271 DIGITAL MULTIPLEXER DI-6 MC720
Contextual Info: MTTL Complex Functions M O TO R O LA MC8200/MC7200 Series T h e M T T L c o m p le x fu n c tio n s are designee for d ig ita l applications in the m e d iu m to high-speed range. These M T T L devices p rovide significant red uction in package c o u n t and increased logic per fu n c tio n over devices in the basic M T T L and

Contextual Info: g MOTOROLA MC3453 MTTL Com patible Quad Line Driver The MC3453 features four SN75110 type line drivers with a common inhibit input. When the inhibit input is high, a constant output current is switched between each pair of output terminals in response to the logic level

mc3450

Abstract: receiver motorola mc
Contextual Info: MOTOROLA SC TELECOM t.SE b 3 b ? 2S3 0 0 flb402 343 MOTS MC3450 MC3452 MOTOROLA SEMICONDUCTOR TECHNICAL DATA QUAD LINE RECEIVERS WITH COMMON THREE-STATE STROBE INPUT QUAD MTTL COMPATIBLE LINE RECEIVERS The M C 345 0 features four M C 75107 type active pullup line

AN-532A

Abstract: AN532A MC1648 MC4324/4024 MC1648 equivalent MC74416
Contextual Info: INTR O D U C TIO N 1 PHASE-DETECTORS 2 OSCILLATORS - M U L TIV IB R A TO R S 3 M IXERS COUNTERS 5 APPLICATIONS 6 PACKAGING PHASE-LOCKED LOOP DATA BOOK Second Edition August, 1973 MECL, MECL III, MECL 10,000, MTTL, and McMOS are trademarks of Motorola Inc.

MC41B

Abstract: MC445 MC565 mc511 MC416 mc400 MC466 MC415 MC465 MC515
Contextual Info: A N D " J-K FLIP-FLO P \ MTTL I MC500/400 series MC515 * M C565 MC415 • M C465 I 4 .0 k v The MC415. MC465. MC51S. and MC565 are clocked flip-flop* that trigger on the negative adgt and parform the J-K logic function. Each flip-flop hat an AND input gating

MC3026

Abstract: MMD7000 DSP56002 MC3026F MC3026L MC3126F MC3126L
Contextual Info: / D U A L 4-INPUT " A N D " POWER G A T E MTTL III MC3100/3000 series ] V MC3126F • MC3026F MC3126L • MC3026L,P 1 This dsvk» consists of two 4-input A N D power Qatts. Each eats is designed for driving high farvout loads <20». 1/2 OF C IR C U IT SHOWN

MC2100 REV c

Abstract: MC2003 TWT Wiring MC2100 MC2103 MC2100 Rev A MC2000 MC2153 1N3606 MC2053
Contextual Info: MTTL II MC2100/2000 series J* D U A L 4-INPUT "N A N O " G A TE MC2103 • MC2153 MC2003 • MC2053 This device consists of two 4-input NAND gates. The fates can be cross coupled to form a multiple-input R-S flip-flop or a circuit for eliminating contact bounce.

MC7400P

Abstract: MC7400 MC5400L MC5400 5D-9 M0400
Contextual Info: jfq u a d 2- i n p u t -N A N O " GATE~\1 MTTL MC7400P series MTTL MC5400L/7400L series MC5400L* MC7400P,L* T his device consists o f fo u r 2 -in p u t N A N D sates. Each gate m ay be used as an inverter, o r tw o gates m ay be cross-coupled t o form bistable circuits.

MC511

Abstract: MC504 mc400 MC404 MC454 MC509 MC510 MC554 h9101 LR1100
Contextual Info: J MTTL I MC500/400 series E X P A N D A B L E 3 W ID E 3 IN P U T 1 I IEXP A N D -O R IN V E R T ' G A T E 1 " MC504 • MC554 MC404 • MC454 This device consists o f three 3 -inp ut A N D gates ORed together driving an o u tp u t inverter. T h e common O R in g nodes are available fo r expansion, and u p to

C4328

Abstract: MC4341 C4339
Contextual Info: MTTL Complex Functions MOTOROLA E M O , COMPLEX FUNCTIONS M C 4 3 0 0 /M C 4 0 0 0 Series T h e M T T L c o m p le x fu n c tio n s are designed fo r d ig ita l app lication s in th e m e d iu m to high-speed range. These M T T L devices p ro vid e s ign ificant re d u c tio n in package co u n t

MC424

Abstract: TWT Wiring MC400 MC474 MC524 MC574
Contextual Info: D U A L J-K F L IP -F L O P C O M M O N C L O C K \ MTTL I MC500/400 series MC524 . MC574 MC424 • MC474 » <'F) OUTPUT DRIVE CLOCK MCS 24 MCS?« MC 434 MC 474 Since these flip -flo p s are charge-storage devices, there is a restriction on th e clock fall tim e th at must be observed.

7400l

Abstract: mh 7400 MC7400P 6321P MC5400L MC7450P MC5450L CETA
Contextual Info: MTTL M C 7400P series MTTL M C 5 40 0 L /7 4 0 0 L series EXPAN D ABLE DUAL 2 -W ID E 2 -IN P U T "A N D -O R -IN V E R T " G A T E MC5450L* MC7450P,L* 1 T h i s d e v ic e c o n s is t s o f t w o A N D -O R -I N V E R T gates, o n e o f w h ic h i s O R e x p a n d a b le . E a c h g a t e is m a d e u p

Contextual Info: C 8-BIT PARITY THEE MTTL MC4000 series MC4008L,P* I ADVANCE INFORMATION/NEW PRODUCT This device consists of 9even Exclusive NOR gates con­ nected to check even parity. The o u tp u t will be in the logic " 1 " state as long as the " 1 " state is present on an even

MC4004

Contextual Info: s I \ 16-BIT S C R A T C H P A D M EM O RY CELL MTTL MC4000 series MC4004F,L* MC4005FfL* ADVANCE IN FO R M A TIO N /N E W PRODUCT T h e M T T L 1 6 -B it M e m o ry Call ca n serve as the b asic buildin g b lo c k fo r scratch p a d m e m o ry syste m s h a ving c yc le tim as of l a »

Contextual Info: Q UAD 2-INPUT "N A N D ” GATE W ITH OPEN COLLECTOR MTTL MC5400F/7400F series MC5401F* MC7401F* 1 / 4 O F C IR C U IT S H O W N This device consists of four 2-input N A N D gales with no output pullup network. It can be used where the Wired-OR function is required, or for driving dis>

MC2100 e rev b

Abstract: MC2100 REV c
Contextual Info: EXPA N D AB LE 2-WIDE 4-INPUT A N D -O R IN V E R T " G A TE MTTL II MC2100/2000 series Y MC2100 • MC2150 MC2000 • MC2050 This device consists of two 4-input ANO gates ORed together and driving an output inverter. The ORmg nodes are available for expansion, and up to 10 ANO

Contextual Info: / D U A L 4-1NPUT "N A N O " B U FFER MTTL MC5400F/7400F series ] I MC5440F * MC7440F * This device consists of two 4-input N A N O power gate circuits. Each gate is designed for driving high fan-out loads <30 . 1/2 O F C IR C U IT SHOWN P ositiva L o g ic : 2 » 1 • 1 2 • 1 3 • 14

Contextual Info: / TRIPLE 3-INPUT "NANO" GATE MC2107 MC2007 \ MTTL II MC2100/2000 series MC2157 MC2057 This device consists o f three 3-input AND gates driving o utp ut inverters. These gates can be used to build a pulse shaping network fo r interfacing w ith discrete component circuits.

ic 7490 pin diagram

Abstract: mh 7490 TTL 7490 MHz frequency counter MECL System Design Handbook ic 7490 truth table mc1004p MC4051 MC8601 motorola Motorola AN-581
Contextual Info: AN-581 Application Note AN MSI 500 MHz FREQUENCY COUNTER USING MECL AND MTTL Prepared By Jon M . DeLaune Application Engineering The design of a MSI 8-digit LED read­ out 5 0 0 M H z counter using M E C L III , M E C L 10,000 and T T L is discussed. De­

ambit rev 2

Abstract: MC3107F DSP56002 MC3007 MC3007F MC3007L MC3107 MC3107L 121-213 ambit circuit
Contextual Info: f TRIPLE 3-INPUT "N A N D "G A TE | Open Collector J MTTL III MC3100/3000 series MC3107F • MC3007F MC3107L ♦ MC3007L,P T h is device consists of three 3-input N A N O gates with no output pull-up circuits. It can be used where the Wired-OR function is required o r for driving dis­

41af

Contextual Info: 41AA M , 41AF(L) Dual 8-4 Input NAND Gate The 41AA(M) and 41AF(L) devices are bipolar, NPN, sealed junction, silicon integrated circuits. They are available In wire-bonded, 16-pin plastic DIPs. Electrical Characteristics MTTL Family LTTL Family V cc « 5.0 ± 0 .5 V, T j = 0 to 8 5 " C

MC4007

Abstract: sn75110 so-14 MC7404 PHL 505 transistor
Contextual Info: MC3453 MTTL Compatible Quad Line Driver The MC3453 features four SN75110 type line drivers with a common inhibit input. When the inhibit input is high, a constant output current is switched between each pair of output terminals in response to the logic level

MC3450P

Abstract: MC7404 MC3450P#
Contextual Info: MC3450 Quad MTTL Compatible Line Receivers The MC3450 features four MC75107 type active pullup line receivers with the addition of a common three–state strobe input. When the strobe input is at a logic zero, each receiver output state is determined by the differential